/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | R600ClauseMergePass.cpp | 80 .getImm(); in getCFAluSize() 87 .getImm(); in isCFAluEnabled() 128 if (LatrCFAlu.getOperand(Mode0Idx).getImm() && in mergeIfPossible() 129 RootCFAlu.getOperand(Mode0Idx).getImm() && in mergeIfPossible() 130 (LatrCFAlu.getOperand(KBank0Idx).getImm() != in mergeIfPossible() 144 if (LatrCFAlu.getOperand(Mode1Idx).getImm() && in mergeIfPossible() 145 RootCFAlu.getOperand(Mode1Idx).getImm() && in mergeIfPossible() 153 if (LatrCFAlu.getOperand(Mode0Idx).getImm()) { in mergeIfPossible() 155 LatrCFAlu.getOperand(Mode0Idx).getImm()); in mergeIfPossible() 161 if (LatrCFAlu.getOperand(Mode1Idx).getImm()) { in mergeIfPossible() [all …]
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H A D | GCNDPPCombine.cpp | 227 RowMaskOpnd->getImm() == 0xF && BankMaskOpnd->getImm() == 0xF; in createDPPInst() 283 DPPInst.addImm(Mod0->getImm()); in createDPPInst() 307 DPPInst.addImm(Mod1->getImm()); in createDPPInst() 340 DPPInst.addImm(Mod2->getImm()); in createDPPInst() 367 DPPInst.addImm(OmodOpr->getImm()); in createDPPInst() 408 DPPInst.addImm(NegOpr->getImm()); in createDPPInst() 447 if (OldOpnd->getImm() == 0) in isIdentityValue() 474 if (OldOpnd->getImm() == 1) in isIdentityValue() 515 return (Imm->getImm() & Mask) == Value; in hasNoImmOrEqual() 558 bool BoundCtrlZero = BCZOpnd->getImm(); in combineDPPMov() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZTargetStreamer.h | 33 A.getNumOperands() == 5 && A.getOperand(2).getImm() == 1 && in operator() 34 B.getOperand(2).getImm() == 1 && "Unexpected EXRL target MCInst"); in operator() 39 if (A.getOperand(1).getImm() != B.getOperand(1).getImm()) in operator() 40 return A.getOperand(1).getImm() < B.getOperand(1).getImm(); in operator() 43 if (A.getOperand(4).getImm() != B.getOperand(4).getImm()) in operator() 44 return A.getOperand(4).getImm() < B.getOperand(4).getImm(); in operator()
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H A D | SystemZAsmPrinter.cpp | 43 .addImm(MI->getOperand(1).getImm()); in lowerRILow() 48 .addImm(MI->getOperand(2).getImm()); in lowerRILow() 57 .addImm(MI->getOperand(1).getImm()); in lowerRIHigh() 62 .addImm(MI->getOperand(2).getImm()); in lowerRIHigh() 72 .addImm(MI->getOperand(3).getImm()) in lowerRIEfLow() 73 .addImm(MI->getOperand(4).getImm()) in lowerRIEfLow() 74 .addImm(MI->getOperand(5).getImm()); in lowerRIEfLow() 124 .addImm(MI->getOperand(2).getImm()) in lowerSubvectorLoad() 134 .addImm(MI->getOperand(2).getImm()) in lowerSubvectorStore() 333 Disp += MI->getOperand(3).getImm(); in emitInstruction() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/VE/MCTargetDesc/ |
H A D | VEInstPrinter.cpp | 79 MI->getOperand(OpNum + 2).getImm() == 0) { in printMemASXOperand() 85 MI->getOperand(OpNum + 1).getImm() == 0 && in printMemASXOperand() 88 MI->getOperand(OpNum + 2).getImm() == 0) { in printMemASXOperand() 96 MI->getOperand(OpNum + 1).getImm() == 0) { in printMemASXOperand() 123 MI->getOperand(OpNum + 1).getImm() == 0) { in printMemASOperandASX() 130 MI->getOperand(OpNum + 1).getImm() == 0) { in printMemASOperandASX() 154 MI->getOperand(OpNum + 1).getImm() == 0) { in printMemASOperandRRM() 161 MI->getOperand(OpNum + 1).getImm() == 0) { in printMemASOperandRRM() 185 MI->getOperand(OpNum + 1).getImm() == 0) { in printMemASOperandHM() 208 int CC = (int)MI->getOperand(OpNum).getImm(); in printCCOperand() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMInstPrinter.cpp | 604 unsigned Imm = MO.getImm(); in printPostIdxImm8Operand() 615 O << (MO2.getImm() ? "" : "-"); in printPostIdxRegOperand() 623 unsigned Imm = MO.getImm(); in printPostIdxImm8s4Operand() 717 if (MO2.getImm()) { in printAddrMode6Operand() 718 O << ":" << (MO2.getImm() << 3); in printAddrMode6Operand() 751 uint32_t v = ~MO.getImm(); in printBitfieldInvMaskImmOperand() 852 if (Op.getImm()) in printSetendOperand() 867 unsigned IFlags = Op.getImm(); in printCPSIFlag() 921 unsigned Mask = Op.getImm() & 0xf; in printMSRMaskOperand() 1290 if (MO2.getImm()) { in printT2AddrModeImm0_1020s4Operand() [all …]
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H A D | ARMMCCodeEmitter.cpp | 331 return MO.getImm(); in getModImmOpValue() 752 return MO.getImm() >> 2; in getARMBranchTargetOpValue() 767 return MO.getImm() >> 2; in getARMBLTargetOpValue() 908 return MO.getImm(); in getThumbAdrLabelOpValue() 1625 Value |= MO3.getImm(); in getT2AddrModeSORegOpValue() 1787 switch (Imm.getImm()) { in getAddrMode6AddressOpValue() 1811 switch (Imm.getImm()) { in getAddrMode6OneLane32AddressOpValue() 1838 switch (Imm.getImm()) { in getAddrMode6DupAddressOpValue() 1926 return isNeg ? -(MO.getImm() >> 1) : (MO.getImm() >> 1); in getBFTargetOpValue() 1946 int Diff = MO.getImm() - BranchMO.getImm(); in getBFAfterTargetOpValue() [all …]
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H A D | ARMMCTargetDesc.cpp | 42 (MI.getOperand(1).isImm() && MI.getOperand(1).getImm() == 0) && in getMCRDeprecationInfo() 425 int64_t Imm = Inst.getOperand(OpNum).getImm(); in evaluateBranch() 452 int32_t OffImm = (int32_t)MO2.getImm(); in evaluateMemOpAddrForAddrMode_i12() 471 unsigned ImmOffs = ARM_AM::getAM3Offset(MO3.getImm()); in evaluateMemOpAddrForAddrMode3() 472 ARM_AM::AddrOpc Op = ARM_AM::getAM3Op(MO3.getImm()); in evaluateMemOpAddrForAddrMode3() 490 unsigned ImmOffs = ARM_AM::getAM5Offset(MO2.getImm()); in evaluateMemOpAddrForAddrMode5() 491 ARM_AM::AddrOpc Op = ARM_AM::getAM5Op(MO2.getImm()); in evaluateMemOpAddrForAddrMode5() 509 unsigned ImmOffs = ARM_AM::getAM5FP16Offset(MO2.getImm()); in evaluateMemOpAddrForAddrMode5FP16() 510 ARM_AM::AddrOpc Op = ARM_AM::getAM5FP16Op(MO2.getImm()); in evaluateMemOpAddrForAddrMode5FP16() 529 int32_t OffImm = (int32_t)MO2.getImm(); in evaluateMemOpAddrForAddrModeT2_i8s4() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/MCTargetDesc/ |
H A D | XtensaInstPrinter.cpp | 63 O << MC.getImm(); in printOperand() 97 int64_t Val = MC.getImm() + 4; in printBranchTarget() 112 int64_t Val = MC.getImm() + 4; in printJumpTarget() 128 int64_t Val = MC.getImm() + 4; in printCallOperand() 143 int64_t Value = MI->getOperand(OpNum).getImm(); in printL32RTarget() 160 int64_t Value = MI->getOperand(OpNum).getImm(); in printImm8_AsmOperand() 172 int64_t Value = MI->getOperand(OpNum).getImm(); in printImm8_sh8_AsmOperand() 184 int64_t Value = MI->getOperand(OpNum).getImm(); in printImm12_AsmOperand() 195 int64_t Value = MI->getOperand(OpNum).getImm(); in printImm12m_AsmOperand() 206 int64_t Value = MI->getOperand(OpNum).getImm(); in printUimm4_AsmOperand() [all …]
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H A D | XtensaMCCodeEmitter.cpp | 167 return MO.getImm(); in getJumpTargetEncoding() 180 return static_cast<uint32_t>(MO.getImm()); in getBranchTargetEncoding() 204 int32_t Res = MO.getImm(); in getCallEncoding() 225 int32_t Res = MO.getImm(); in getL32RTargetEncoding() 277 int32_t Res = MO.getImm(); in getImm8OpValue() 289 int32_t Res = MO.getImm(); in getImm8_sh8OpValue() 302 int32_t Res = MO.getImm(); in getImm12OpValue() 314 uint32_t Res = static_cast<uint32_t>(MO.getImm()); in getUimm4OpValue() 326 uint32_t Res = static_cast<uint32_t>(MO.getImm()); in getUimm5OpValue() 338 uint32_t Res = static_cast<uint32_t>(MO.getImm()); in getShimm1_31OpValue() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/MCTargetDesc/ |
H A D | LanaiMCCodeEmitter.cpp | 139 unsigned AluCode = AluOp.getImm(); in adjustPqBits() 201 assert(isInt<16>(Op2.getImm()) && in getRiMemoryOpValue() 204 Encoding |= (Op2.getImm() & 0xffff); in getRiMemoryOpValue() 205 if (Op2.getImm() != 0) { in getRiMemoryOpValue() 206 if (LPAC::isPreOp(AluOp.getImm())) in getRiMemoryOpValue() 208 if (LPAC::isPostOp(AluOp.getImm())) in getRiMemoryOpValue() 232 unsigned AluOp = AluMCOp.getImm(); in getRrMemoryOpValue() 272 assert(isInt<10>(Op2.getImm()) && in getSplsOpValue() 275 Encoding |= (Op2.getImm() & 0x3ff); in getSplsOpValue() 276 if (Op2.getImm() != 0) { in getSplsOpValue() [all …]
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H A D | LanaiInstPrinter.cpp | 49 unsigned AluCode = MI->getOperand(3).getImm(); in usesGivenOffset() 56 unsigned AluCode = MI->getOperand(3).getImm(); in isPreIncrementForm() 61 unsigned AluCode = MI->getOperand(3).getImm(); in isPostIncrementForm() 66 if (MI->getOperand(2).getImm() < 0) in decIncOperator() 156 OS << formatHex(Op.getImm()); in printOperand() 181 OS << formatHex(Op.getImm() << 16); in printHi16ImmOperand() 205 OS << formatHex(0xffff0000 | Op.getImm()); in printLo16AndImmOperand() 232 OS << OffsetOp.getImm(); in printMemoryImmediateOffset() 243 const unsigned AluCode = AluOp.getImm(); in printMemRiOperand() 258 const unsigned AluCode = AluOp.getImm(); in printMemRrOperand() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/ |
H A D | PPCInstPrinter.cpp | 115 unsigned char SH = MI->getOperand(2).getImm(); in printInst() 116 unsigned char MB = MI->getOperand(3).getImm(); in printInst() 117 unsigned char ME = MI->getOperand(4).getImm(); in printInst() 139 unsigned char SH = MI->getOperand(2).getImm(); in printInst() 189 unsigned char L = MI->getOperand(0).getImm(); in printInst() 222 unsigned Code = MI->getOperand(OpNo).getImm(); in printPredicateOperand() 319 unsigned Code = MI->getOperand(OpNo).getImm(); in printATBitsAsHint() 361 int Value = MI->getOperand(OpNo).getImm(); in printS5ImmOperand() 428 O << (short)MI->getOperand(OpNo).getImm(); in printS16ImmOperand() 526 O << MI->getOperand(OpNo).getImm(); in printMemRegImmHash() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/AsmParser/ |
H A D | PPCAsmParser.cpp | 247 int64_t getImm() const { in getImm() function 379 return (Kind == Immediate && getImm() <= -8 && getImm() >= -512 && in isHashImmX8() 380 (getImm() & 7) == 0); in isHashImmX8() 385 (Kind == Immediate && isInt<34>(getImm()) && (getImm() & 15) == 0); in isS34ImmX16() 400 if ((getImm() & 3) != 0) in isDirectBr() 402 if (isInt<26>(getImm())) in isDirectBr() 406 if (isUInt<32>(getImm()) && isInt<26>(static_cast<int32_t>(getImm()))) in isDirectBr() 432 return Kind == Immediate && isUInt<6>(getImm()) && ((getImm() & 1) == 0); in isVSRpEvenRegNumber() 785 OS << getImm(); in print() 957 int64_t N = Inst.getOperand(2).getImm(); in ProcessInstruction() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
H A D | AArch64MCCodeEmitter.cpp | 262 return MO.getImm(); in getAdrLabelOpValue() 324 return MO.getImm(); in getCondBranchTargetOpValue() 347 return -(MO.getImm()); in getPAuthPCRelOpValue() 369 return MO.getImm(); in getLoadLiteralOpValue() 397 return MO.getImm(); in getMoveWideImmOpValue() 417 return MO.getImm(); in getTestBranchTargetOpValue() 439 return MO.getImm(); in getBranchTargetOpValue() 466 switch (MO.getImm()) { in getVecShifterOpValue() 525 return 8 - MO.getImm(); in getVecShiftR8OpValue() 561 return MO.getImm() - 8; in getVecShiftL8OpValue() [all …]
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H A D | AArch64InstPrinter.cpp | 113 switch (Op3.getImm()) { in printInst() 151 int64_t immr = Op2.getImm(); in printInst() 152 int64_t imms = Op3.getImm(); in printInst() 186 if (Op2.getImm() > Op3.getImm()) { in printInst() 207 markup(O, Markup::Immediate) << "#" << Op3.getImm() - Op2.getImm() + 1; in printInst() 911 unsigned CnVal = Cn.getImm(); in printSysAlias() 912 unsigned CmVal = Cm.getImm(); in printSysAlias() 1032 unsigned CnVal = Cn.getImm(); in printSyspAlias() 1033 unsigned CmVal = Cm.getImm(); in printSyspAlias() 1135 unsigned svcrop = MO.getImm(); in printSVCROp() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
H A D | R600InstPrinter.cpp | 36 int BankSwizzle = MI->getOperand(OpNo).getImm(); in printBankSwizzle() 64 unsigned CT = MI->getOperand(OpNo).getImm(); in printCT() 79 int KCacheMode = MI->getOperand(OpNo).getImm(); in printKCache() 81 int KCacheBank = MI->getOperand(OpNo - 2).getImm(); in printKCache() 83 int KCacheAddr = MI->getOperand(OpNo + 2).getImm(); in printKCache() 99 int64_t Imm = Op.getImm(); in printLiteral() 114 switch (MI->getOperand(OpNo).getImm()) { in printOMOD() 155 O << Op.getImm(); in printOperand() 178 unsigned Sel = MI->getOperand(OpNo).getImm(); in printRSel() 219 if (Op.getImm() == 0) { in printWrite()
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H A D | R600MCCodeEmitter.cpp | 99 uint32_t InstWord2 = MI.getOperand(2).getImm(); // Offset in encodeInstruction() 108 int64_t Sampler = MI.getOperand(14).getImm(); in encodeInstruction() 111 MI.getOperand(2).getImm(), in encodeInstruction() 112 MI.getOperand(3).getImm(), in encodeInstruction() 113 MI.getOperand(4).getImm(), in encodeInstruction() 114 MI.getOperand(5).getImm() in encodeInstruction() 117 MI.getOperand(6).getImm() & 0x1F, in encodeInstruction() 118 MI.getOperand(7).getImm() & 0x1F, in encodeInstruction() 119 MI.getOperand(8).getImm() & 0x1F in encodeInstruction() 179 return MO.getImm(); in getMachineOpValue()
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H A D | AMDGPUInstPrinter.cpp | 62 int64_t Imm = MI->getOperand(OpNo).getImm(); in printU16ImmOperand() 92 if (MI->getOperand(OpNo).getImm()) { in printNamedBit() 136 if (MI->getOperand(OpNo).getImm()) { in printOffset0() 145 if (MI->getOperand(OpNo).getImm()) { in printOffset1() 178 auto Imm = MI->getOperand(OpNo).getImm(); in printCPol() 289 if (MI->getOperand(OpNo).getImm()) { in printDMask() 811 O << formatDec(Op.getImm()); in printRegularOperand() 1188 if (MI->getOperand(ComprIdx).getImm()) in printExpSrcN() 1455 if (Op.getImm() == 1) { in printIfSet() 1466 if (Op.getImm() == 1) in printIfSet() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/MCTargetDesc/ |
H A D | CSKYMCCodeEmitter.cpp | 35 return MO.getImm() - 1; in getOImmOpValue() 45 auto V = (MO.getImm() <= 3) ? 4 : MO.getImm(); in getImmOpValueIDLY() 57 return MSB.getImm() - LSB.getImm(); in getImmOpValueMSBSize() 133 .addImm(MI.getOperand(2).getImm() + 1); in expandRSUBI() 224 auto V = 1 << MI.getOperand(1).getImm(); in encodeInstruction() 242 return static_cast<unsigned>(MO.getImm()); in getMachineOpValue() 256 unsigned Rz = MI.getOperand(Idx + 1).getImm(); in getRegSeqImmOpValue() 281 if (MI.getOperand(Idx).getImm() == 16) in getImmJMPIX() 283 else if (MI.getOperand(Idx).getImm() == 24) in getImmJMPIX() 285 else if (MI.getOperand(Idx).getImm() == 32) in getImmJMPIX() [all …]
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H A D | CSKYInstPrinter.cpp | 136 O << formatHex(MO.getImm()); in printOperand() 138 O << MO.getImm(); in printOperand() 153 O << MO.getImm(); in printDataSymbol() 166 uint64_t Target = Address + MO.getImm(); in printConstpool() 170 O << MO.getImm(); in printConstpool() 192 uint64_t Target = Address + MO.getImm(); in printCSKYSymbolOperand() 196 O << MO.getImm(); in printCSKYSymbolOperand() 202 auto V = MI->getOperand(OpNo).getImm(); in printPSRFlag() 227 auto V = MI->getOperand(OpNum).getImm(); in printRegisterList()
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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | StackMaps.h | 47 uint64_t getID() const { return MI->getOperand(IDPos).getImm(); } in getID() 51 return MI->getOperand(NBytesPos).getImm(); in getNumPatchBytes() 101 uint64_t getID() const { return getMetaOper(IDPos).getImm(); } in getID() 105 return getMetaOper(NBytesPos).getImm(); in getNumPatchBytes() 115 return getMetaOper(CCPos).getImm(); in getCallingConv() 122 return MI->getOperand(getMetaIdx(NArgPos)).getImm(); in getNumCallArgs() 204 uint64_t getID() const { return MI->getOperand(NumDefs + IDPos).getImm(); } in getID() 208 return MI->getOperand(NumDefs + NBytesPos).getImm(); in getNumPatchBytes() 218 return MI->getOperand(getCCIdx()).getImm(); in getCallingConv() 222 uint64_t getFlags() const { return MI->getOperand(getFlagsIdx()).getImm(); } in getFlags() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/AsmParser/ |
H A D | LanaiAsmParser.cpp | 159 const MCExpr *getImm() const { in getImm() function 407 addExpr(Inst, getImm()); in addImmOperands() 412 addExpr(Inst, getImm()); in addBrTargetOperands() 417 addExpr(Inst, getImm()); in addCallTargetOperands() 422 addExpr(Inst, getImm()); in addCondCodeOperands() 456 addExpr(Inst, getImm()); in addImmShiftOperands() 461 addExpr(Inst, getImm()); in addImm10Operands() 469 else if (isa<LanaiMCExpr>(getImm())) { in addLoImm16Operands() 561 OS << "Imm: " << getImm() << "\n"; in print() 612 const MCExpr *Imm = Op->getImm(); in MorphToMemImm() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/MCTargetDesc/ |
H A D | WebAssemblyMCCodeEmitter.cpp | 105 encodeSLEB128(int32_t(MO.getImm()), OS); in encodeInstruction() 108 encodeULEB128(uint32_t(MO.getImm()), OS); in encodeInstruction() 111 encodeSLEB128(int64_t(MO.getImm()), OS); in encodeInstruction() 115 support::endian::write<uint8_t>(OS, MO.getImm(), in encodeInstruction() 119 support::endian::write<uint16_t>(OS, MO.getImm(), in encodeInstruction() 123 support::endian::write<uint32_t>(OS, MO.getImm(), in encodeInstruction() 127 support::endian::write<uint64_t>(OS, MO.getImm(), in encodeInstruction() 136 encodeULEB128(uint64_t(MO.getImm()), OS); in encodeInstruction() 139 encodeULEB128(uint64_t(MO.getImm()), OS); in encodeInstruction()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64AsmPrinter.cpp | 860 O << MO.getImm(); in printOperand() 932 if (MO.isImm() && MO.getImm() == 0) { in PrintAsmOperand() 1557 MI->getOperand(1).getImm() == 0) { in emitInstruction() 1789 if (MI->getOperand(1).getImm() == 30 && MI->getOperand(0).getImm() >= 19 && in emitInstruction() 1790 MI->getOperand(0).getImm() <= 28) { in emitInstruction() 1797 assert((MI->getOperand(1).getImm() - MI->getOperand(0).getImm() == 1) && in emitInstruction() 1804 assert((MI->getOperand(1).getImm() - MI->getOperand(0).getImm() == 1) && in emitInstruction() 1825 assert((MI->getOperand(1).getImm() - MI->getOperand(0).getImm() == 1) && in emitInstruction() 1832 assert((MI->getOperand(1).getImm() - MI->getOperand(0).getImm() == 1) && in emitInstruction() 1869 assert(MI->getOperand(1).getImm() - MI->getOperand(0).getImm() == 1 && in emitInstruction() [all …]
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