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Searched refs:getKillRegState (Results 1 – 25 of 72) sorted by relevance

123

/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRExpandPseudoInsts.cpp165 .addReg(DstLoReg, getKillRegState(DstIsKill)) in expandArith()
166 .addReg(SrcLoReg, getKillRegState(SrcIsKill)); in expandArith()
476 .addReg(DstLoReg, getKillRegState(DstIsKill)); in expand()
509 .addReg(DstLoReg, getKillRegState(DstIsKill)) in expand()
675 .addDef(DstReg, getKillRegState(DstIsKill)) in expand()
676 .addReg(SrcReg, getKillRegState(SrcIsKill)) in expand()
693 .addReg(SrcReg, getKillRegState(SrcIsKill)) in expand()
802 .addDef(DstReg, getKillRegState(DstIsKill)) in expand()
803 .addReg(SrcReg, getKillRegState(SrcIsKill)) in expand()
827 .addReg(SrcReg, getKillRegState(SrcIsKill)) in expand()
[all …]
H A DAVRInstrInfo.cpp54 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
68 .addReg(SrcHi, getKillRegState(KillSrc) | RegState::Undef); in copyPhysReg()
70 .addReg(SrcLo, getKillRegState(KillSrc) | RegState::Undef); in copyPhysReg()
73 .addReg(SrcLo, getKillRegState(KillSrc) | RegState::Undef); in copyPhysReg()
75 .addReg(SrcHi, getKillRegState(KillSrc) | RegState::Undef); in copyPhysReg()
90 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
160 .addReg(SrcReg, getKillRegState(isKill)) in storeRegToStackSlot()
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVERegisterInfo.cpp305 TmpReg, getKillRegState(true)); in processSTVM()
309 build(VE::SVMmr, TmpReg).addReg(SrcReg, getKillRegState(isKill)).addImm(3); in processSTVM()
352 build(VE::LVMir, DestReg).addImm(i).addReg(TmpReg, getKillRegState(true)); in processLDVM()
356 .addReg(TmpReg, getKillRegState(true)) in processLDVM()
361 .addReg(TmpReg, getKillRegState(true)) in processLDVM()
387 TmpReg, getKillRegState(true)); in processSTVM512()
398 TmpReg, getKillRegState(true)); in processSTVM512()
433 .addReg(TmpReg, getKillRegState(true)) in processLDVM512()
443 .addReg(TmpReg, getKillRegState(true)) in processLDVM512()
451 .addReg(TmpReg, getKillRegState(true)) in processLDVM512()
H A DVEInstrInfo.cpp366 .addReg(SrcReg, getKillRegState(KillSrc)) in copyPhysReg()
385 .addReg(SubTmp, getKillRegState(true)); in copyPhysReg()
390 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
481 .addReg(SrcReg, getKillRegState(isKill)) in storeRegToStackSlot()
488 .addReg(SrcReg, getKillRegState(isKill)) in storeRegToStackSlot()
495 .addReg(SrcReg, getKillRegState(isKill)) in storeRegToStackSlot()
502 .addReg(SrcReg, getKillRegState(isKill)) in storeRegToStackSlot()
509 .addReg(SrcReg, getKillRegState(isKill)) in storeRegToStackSlot()
516 .addReg(SrcReg, getKillRegState(isKill)) in storeRegToStackSlot()
932 .addReg(Src, getKillRegState(KillSrc)); in expandPostRAPseudo()
[all …]
H A DVEISelLowering.cpp2045 .addReg(Tmp1, getKillRegState(true)) in prepareMBB()
2049 .addReg(Tmp2, getKillRegState(true)) in prepareMBB()
2061 .addReg(Tmp1, getKillRegState(true)) in prepareMBB()
2064 .addReg(Tmp2, getKillRegState(true)) in prepareMBB()
2149 .addReg(Tmp1, getKillRegState(true)) in prepareSymbol()
2152 .addReg(Tmp2, getKillRegState(true)) in prepareSymbol()
2367 .addReg(Tmp, getKillRegState(true)) in emitEHSjLjLongJmp()
2473 .addReg(Abort, getKillRegState(true)) in emitSjLjDispatchBlock()
2537 .addReg(Tmp1, getKillRegState(true)) in emitSjLjDispatchBlock()
2541 .addReg(Tmp2, getKillRegState(true)) in emitSjLjDispatchBlock()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcInstrInfo.cpp456 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
464 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
468 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
479 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
496 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
500 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
545 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO); in storeRegToStackSlot()
548 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO); in storeRegToStackSlot()
551 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO); in storeRegToStackSlot()
554 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO); in storeRegToStackSlot()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DThumb1InstrInfo.cpp53 .addReg(SrcReg, getKillRegState(KillSrc)) in copyPhysReg()
63 .addReg(SrcReg, getKillRegState(KillSrc)) in copyPhysReg()
71 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
99 .addReg(SrcReg, getKillRegState(isKill)) in storeRegToStackSlot()
H A DMLxExpansionPass.cpp291 .addReg(Src1Reg, getKillRegState(Src1Kill)) in ExpandFPMLxInstruction()
292 .addReg(Src2Reg, getKillRegState(Src2Kill)); in ExpandFPMLxInstruction()
302 MIB.addReg(TmpReg, getKillRegState(true)) in ExpandFPMLxInstruction()
303 .addReg(AccReg, getKillRegState(AccKill)); in ExpandFPMLxInstruction()
305 MIB.addReg(AccReg).addReg(TmpReg, getKillRegState(true)); in ExpandFPMLxInstruction()
H A DARMLoadStoreOptimizer.cpp746 .addReg(Base, getKillRegState(KillOldBase)); in CreateLoadStoreMulti()
749 .addReg(Base, getKillRegState(KillOldBase)) in CreateLoadStoreMulti()
759 .addReg(Base, getKillRegState(KillOldBase)) in CreateLoadStoreMulti()
765 .addReg(Base, getKillRegState(KillOldBase)) in CreateLoadStoreMulti()
770 .addReg(Base, getKillRegState(KillOldBase)) in CreateLoadStoreMulti()
812 .addReg(Base, getKillRegState(BaseKill)); in CreateLoadStoreMulti()
821 MIB.addReg(Base, getKillRegState(BaseKill)); in CreateLoadStoreMulti()
851 MIB.addReg(Regs[0].first, getKillRegState(Regs[0].second)) in CreateLoadStoreDouble()
1351 .addReg(Base, getKillRegState(BaseKill)) in MergeBaseUpdateLSMultiple()
1811 .addReg(BaseReg, getKillRegState(BaseKill)) in FixInvalidRegPairOp()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchInstrInfo.cpp45 .addReg(SrcReg, getKillRegState(KillSrc)) in copyPhysReg()
53 .addReg(SrcReg, getKillRegState(KillSrc)) in copyPhysReg()
61 .addReg(SrcReg, getKillRegState(KillSrc)) in copyPhysReg()
70 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
77 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
83 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
107 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
140 .addReg(SrcReg, getKillRegState(IsKill)) in storeRegToStackSlot()
/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFInstrInfo.cpp37 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
40 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
136 .addReg(SrcReg, getKillRegState(IsKill)) in storeRegToStackSlot()
141 .addReg(SrcReg, getKillRegState(IsKill)) in storeRegToStackSlot()
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYInstrInfo.cpp429 .addReg(SrcReg, getKillRegState(IsKill)) in storeRegToStackSlot()
486 .addReg(SrcReg, getKillRegState(KillSrc)) in copyPhysReg()
491 .addReg(SrcReg, getKillRegState(KillSrc)) in copyPhysReg()
502 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
510 .addReg(DestReg, getKillRegState(true)) in copyPhysReg()
511 .addReg(DestReg, getKillRegState(true)) in copyPhysReg()
512 .addReg(SrcReg, getKillRegState(true)); in copyPhysReg()
563 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
H A DCSKYRegisterInfo.cpp210 .addReg(NewReg, getKillRegState(true)) in eliminateFrameIndex()
230 .addReg(NewReg, getKillRegState(true)) in eliminateFrameIndex()
231 .addReg(NewReg, getKillRegState(true)) in eliminateFrameIndex()
240 .addReg(NewReg, getKillRegState(true)) in eliminateFrameIndex()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrBuilder.h159 return addOffset(MIB.addReg(Reg, getKillRegState(isKill)), Offset); in addRegOffset()
167 return MIB.addReg(Reg1, getKillRegState(isKill1)).addImm(1) in addRegReg()
168 .addReg(Reg2, getKillRegState(isKill2)).addImm(0).addReg(0); in addRegReg()
/freebsd/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreRegisterInfo.cpp77 .addReg(Reg, getKillRegState(MI.getOperand(0).isKill())) in InsertFPImmInst()
114 .addReg(Reg, getKillRegState(MI.getOperand(0).isKill())) in InsertFPConstInst()
148 .addReg(Reg, getKillRegState(MI.getOperand(0).isKill())) in InsertSPImmInst()
193 .addReg(Reg, getKillRegState(MI.getOperand(0).isKill())) in InsertSPConstInst()
H A DXCoreInstrInfo.cpp340 .addReg(SrcReg, getKillRegState(KillSrc)) in copyPhysReg()
352 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
372 .addReg(SrcReg, getKillRegState(isKill)) in storeRegToStackSlot()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVRegisterInfo.cpp234 .addReg(SrcReg, getKillRegState(KillSrcReg)) in adjustReg()
252 .addReg(SrcReg, getKillRegState(KillSrcReg)) in adjustReg()
271 .addReg(SrcReg, getKillRegState(KillSrcReg)) in adjustReg()
341 .addReg(Base, getKillRegState(I == NF - 1)) in lowerVSPILL()
346 .addReg(Base, getKillRegState(I != 0 || IsBaseKill)) in lowerVSPILL()
347 .addReg(VL, getKillRegState(I == NF - 2)); in lowerVSPILL()
414 .addReg(Base, getKillRegState(I == NF - 1)) in lowerVRELOAD()
418 .addReg(Base, getKillRegState(I != 0 || IsBaseKill)) in lowerVRELOAD()
419 .addReg(VL, getKillRegState(I == NF - 2)); in lowerVRELOAD()
H A DRISCVInstrInfo.cpp392 getKillRegState(KillSrc)); in copyPhysRegVector()
412 .addReg(SrcReg, getKillRegState(KillSrc)) in copyPhysReg()
422 getKillRegState(KillSrc)) in copyPhysReg()
427 getKillRegState(KillSrc)) in copyPhysReg()
457 .addReg(SrcReg, getKillRegState(KillSrc)) in copyPhysReg()
458 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
464 .addReg(SrcReg, getKillRegState(KillSrc)) in copyPhysReg()
465 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
471 .addReg(SrcReg, getKillRegState(KillSrc)) in copyPhysReg()
663 .addReg(SrcReg, getKillRegState(IsKill)) in storeRegToStackSlot()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64AdvSIMDScalarPass.cpp278 .addReg(Src, getKillRegState(IsKill)); in insertCopy()
363 .addReg(Src0, getKillRegState(KillSrc0), SubReg0) in transformInstruction()
364 .addReg(Src1, getKillRegState(KillSrc1), SubReg1); in transformInstruction()
/freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430InstrInfo.cpp53 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO); in storeRegToStackSlot()
57 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO); in storeRegToStackSlot()
103 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.cpp706 .addReg(VReg1, getKillRegState(true)) in generateLoadForNewConst()
908 .addReg(RegX, getKillRegState(KillX)) in reassociateFMA()
913 .addReg(RegY, getKillRegState(KillY)) in reassociateFMA()
925 .addReg(NewVRB, getKillRegState(true)) in reassociateFMA()
949 .addReg(RegX, getKillRegState(KillX)) in reassociateFMA()
1695 getKillRegState(KillSrc); in copyPhysReg()
1712 getKillRegState(KillSrc); in copyPhysReg()
1728 getKillRegState(KillSrc); in copyPhysReg()
1735 getKillRegState(KillSrc); in copyPhysReg()
1740 getKillRegState(KillSrc); in copyPhysReg()
[all …]
H A DPPCRegisterInfo.cpp770 .addReg(NegSizeReg, getKillRegState(KillNegSizeReg)); in lowerDynamicAlloc()
778 .addReg(NegSizeReg, getKillRegState(KillNegSizeReg)); in lowerDynamicAlloc()
858 .addReg(UnalNegSizeReg, getKillRegState(KillNegSizeReg)) in prepareDynamicAlloca()
875 .addReg(UnalNegSizeReg, getKillRegState(KillNegSizeReg)) in prepareDynamicAlloca()
975 .addReg(SrcReg, getKillRegState(MI.getOperand(0).isKill())); in lowerCRSpilling()
1256 .addReg(Reg, getKillRegState(IsKilled)), in spillRegPairs()
1260 .addReg(Reg + 1, getKillRegState(IsKilled)), in spillRegPairs()
1265 .addReg(Reg + 2, getKillRegState(IsKilled)), in spillRegPairs()
1342 .addReg(Reg, getKillRegState(IsKilled)), in lowerACCSpilling()
1473 .addReg(Reg, getKillRegState(IsKilled)), in lowerQuadwordSpilling()
[all …]
H A DPPCFrameLowering.cpp809 .addReg(TempReg, getKillRegState(true)) in emitPrologue()
844 .addReg(ScratchReg, getKillRegState(!HasROPProtect)) in emitPrologue()
862 .addReg(ScratchReg, getKillRegState(true)) in emitPrologue()
875 .addReg(TempReg, getKillRegState(true)) in emitPrologue()
981 .addReg(TOCReg, getKillRegState(true)) in emitPrologue()
1788 .addReg(TempReg, getKillRegState(i == e-1)); in emitEpilogue()
1864 .addReg(TempReg, getKillRegState(i == e-1)); in emitEpilogue()
2474 getKillRegState(true)), in spillCalleeSavedRegisters()
2490 .addReg(VSRContainingGPRs[Dst].first, getKillRegState(true)) in spillCalleeSavedRegisters()
2546 .addReg(MoveReg, getKillRegState(!CR4Spilled))); in restoreCRs()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsSEInstrInfo.cpp112 .addReg(SrcReg, RegState::Implicit | getKillRegState(KillSrc)); in copyPhysReg()
133 .addReg(SrcReg, getKillRegState(KillSrc)).addImm(1 << 4) in copyPhysReg()
139 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
180 MIB.addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
284 BuildMI(MBB, I, DL, get(Opc)).addReg(SrcReg, getKillRegState(isKill)) in storeRegToStack()
723 LoInst.addReg(SrcLo.getReg(), getKillRegState(SrcLo.isKill())); in expandPseudoMTLoHi()
724 HiInst.addReg(SrcHi.getReg(), getKillRegState(SrcHi.isKill())); in expandPseudoMTLoHi()
734 unsigned KillSrc = getKillRegState(Src.isKill()); in expandCvtFPInt()
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kInstrBuilder.h51 return MIB.addImm(Offset).addReg(Reg, getKillRegState(IsKill)); in addRegIndirectWithDisp()

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