/freebsd/sys/contrib/device-tree/src/arm/microchip/ |
H A D | sama5d3_lcd.dtsi | 60 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */ 61 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */ 62 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */ 63 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */ 64 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */ 65 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */ 66 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */ 67 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */ 68 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */ 69 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */ [all …]
|
H A D | at91sam9x5_lcd.dtsi | 63 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */ 64 AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */ 65 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */ 66 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */ 67 AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */ 68 AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */ 69 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */ 70 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */ 71 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */ 72 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */ [all …]
|
/freebsd/sys/contrib/device-tree/src/arm64/exynos/ |
H A D | exynosautov9-pinctrl.dtsi | 3 * Samsung's ExynosAutov9 SoC pin-mux and pin-config device tree source 7 * Samsung's ExynosAutov9 SoC pin-mux and pin-config options are listed as 42 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 47 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 61 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 67 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 107 samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; 113 samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; 119 samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; 221 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; [all …]
|
H A D | exynos7885-pinctrl.dtsi | 3 * Samsung Exynos7885 SoC pin-mux and pin-config device tree source 8 * Samsung's Exynos7885 SoC pin-mux and pin-config options are listed as 85 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 91 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 98 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 106 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 267 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 281 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 689 samsung,pin-val = <1>; 709 samsung,pin-val = <1>; [all …]
|
H A D | exynosautov920-pinctrl.dtsi | 3 * Samsung's ExynosAutov920 SoC pin-mux and pin-config device tree source 7 * Samsung's ExynosAutov920 SoC pin-mux and pin-config options are listed as 183 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 190 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 197 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 204 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 294 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 300 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 306 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 312 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; [all …]
|
H A D | exynos5433-pinctrl.dtsi | 3 * Samsung's Exynos5433 SoC pin-mux and pin-config device tree source 8 * Samsung's Exynos5433 SoC pin-mux and pin-config options are listed as device 15 pin- ## _pin { \ 195 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 202 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 287 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 294 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 301 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 322 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 329 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; [all …]
|
H A D | exynos7-pinctrl.dtsi | 3 * Samsung's Exynos7 SoC pin-mux and pin-config device tree source 8 * Samsung's Exynos7 SoC pin-mux and pin-config options are listed as 190 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 191 samsung,pin-drv = <EXYNOS7_PIN_DRV_LV1>; 197 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 198 samsung,pin-drv = <EXYNOS7_PIN_DRV_LV1>; 204 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 232 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 253 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 260 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; [all …]
|
H A D | exynos850-pinctrl.dtsi | 3 * Samsung's Exynos850 SoC pin-mux and pin-config device tree source 8 * Samsung's Exynos850 SoC pin-mux and pin-config options are listed as device 109 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 117 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 125 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 132 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 221 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 251 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 363 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 370 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; [all …]
|
/freebsd/sys/contrib/device-tree/src/arm/samsung/ |
H A D | s5pv210-pinctrl.dtsi | 11 * Samsung's S5PV210 SoC pin banks, pin-mux and pin-config options are 18 pin- ## _pin { \ 281 samsung,pin-drv = <S5PV210_PIN_DRV_LV1>; 288 samsung,pin-drv = <S5PV210_PIN_DRV_LV1>; 295 samsung,pin-drv = <S5PV210_PIN_DRV_LV1>; 302 samsung,pin-drv = <S5PV210_PIN_DRV_LV1>; 309 samsung,pin-drv = <S5PV210_PIN_DRV_LV1>; 316 samsung,pin-drv = <S5PV210_PIN_DRV_LV1>; 323 samsung,pin-drv = <S5PV210_PIN_DRV_LV1>; 330 samsung,pin-drv = <S5PV210_PIN_DRV_LV1>; [all …]
|
H A D | exynos4x12-pinctrl.dtsi | 3 * Samsung's Exynos4x12 SoCs pin-mux and pin-config device tree source 8 * Samsung's Exynos4x12 SoCs pin-mux and pin-config options are listed as device 15 pin- ## _pin { \ 130 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 137 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 144 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 151 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 157 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 185 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 206 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; [all …]
|
H A D | exynos4210-pinctrl.dtsi | 3 * Samsung's Exynos4210 SoC pin-mux and pin-config device tree source 10 * Samsung's Exynos4210 SoC pin-mux and pin-config options are listed as device 149 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 156 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 163 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 170 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 176 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 204 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 225 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 232 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; [all …]
|
H A D | exynos5420-pinctrl.dtsi | 3 * Samsung's Exynos5420 SoC pin-mux and pin-config device tree source 8 * Samsung's Exynos5420 SoC pin-mux and pin-config options are listed as device 64 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 71 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 177 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 184 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 191 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 198 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 226 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 233 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; [all …]
|
H A D | exynos5250-pinctrl.dtsi | 3 * Samsung's Exynos5250 SoC pin-mux and pin-config device tree source 8 * Samsung's Exynos5250 SoC pin-mux and pin-config options are listed as device 204 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 211 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 217 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 224 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 251 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 258 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 272 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 279 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; [all …]
|
H A D | exynos3250-pinctrl.dtsi | 3 * Samsung's Exynos3250 SoCs pin-mux and pin-config device tree source 8 * Samsung's Exynos3250 SoCs pin-mux and pin-config options are listed as device 15 pin- ## _pin { \ 23 pin- ## _pin { \ 90 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 97 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 104 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 117 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 131 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 138 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; [all …]
|
H A D | s3c64xx-pinctrl.dtsi | 4 * - pin control-related definitions 8 * Samsung's S3C64xx SoCs pin banks, pin-mux and pin-config options are 137 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; 143 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; 149 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; 203 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>; 210 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>; 216 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>; 228 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>; 264 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>; [all …]
|
H A D | exynos5260-pinctrl.dtsi | 3 * Samsung's Exynos5260 SoC pin-mux and pin-config device tree source 8 * Samsung's Exynos5260 SoC pin-mux and pin-config options are listed as device 237 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 244 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 281 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 288 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 295 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 302 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 309 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 316 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; [all …]
|
H A D | exynos5410-pinctrl.dtsi | 3 * Exynos5410 SoC pin-mux and pin-config device tree source 311 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 332 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 346 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 353 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 360 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 395 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 402 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 647 samsung,pin-function = <2>; 648 samsung,pin-pud = <0>; [all …]
|
/freebsd/sys/contrib/device-tree/src/arm64/exynos/google/ |
H A D | gs101-pinctrl.dtsi | 3 * GS101 SoC pin-mux and pin-config device tree source 121 samsung,pin-pud = <GS101_PIN_PULL_NONE>; 127 samsung,pin-pud = <GS101_PIN_PULL_NONE>; 133 samsung,pin-pud = <GS101_PIN_PULL_NONE>; 139 samsung,pin-pud = <GS101_PIN_PULL_NONE>; 146 samsung,pin-pud = <GS101_PIN_PULL_NONE>; 257 samsung,pin-pud = <GS101_PIN_PULL_UP>; 303 samsung,pin-pud = <GS101_PIN_PULL_UP>; 310 samsung,pin-pud = <GS101_PIN_PULL_UP>; 317 samsung,pin-pud = <GS101_PIN_PULL_UP>; [all …]
|
/freebsd/sys/dev/qcom_tlmm/ |
H A D | qcom_tlmm_ipq4018_hw.c | 69 int pin, int function) in qcom_tlmm_ipq4018_hw_pin_set_function() argument 75 if (pin >= sc->gpio_npins) in qcom_tlmm_ipq4018_hw_pin_set_function() 97 int pin, int *function) in qcom_tlmm_ipq4018_hw_pin_get_function() argument 103 if (pin >= sc->gpio_npins) in qcom_tlmm_ipq4018_hw_pin_get_function() 122 int pin) in qcom_tlmm_ipq4018_hw_pin_set_oe_output() argument 128 if (pin >= sc->gpio_npins) in qcom_tlmm_ipq4018_hw_pin_set_oe_output() 147 int pin) in qcom_tlmm_ipq4018_hw_pin_set_oe_input() argument 153 if (pin >= sc->gpio_npins) in qcom_tlmm_ipq4018_hw_pin_set_oe_input() 177 if (pin >= sc->gpio_npins) in qcom_tlmm_ipq4018_hw_pin_get_oe_state() 199 if (pin >= sc->gpio_npins) in qcom_tlmm_ipq4018_hw_pin_set_output_value() [all …]
|
/freebsd/sys/arm/mv/ |
H A D | gpio.c | 99 int pin; member 414 if (pin < 0 || pin >= sc->pin_num) in mv_gpio_setup_intrhandler() 433 "gpio%d:", pin); in mv_gpio_setup_intrhandler() 499 int i, pin; in mv_gpio_exec_intr_handlers() local 713 sd->pin = pin; in mv_gpio_debounce_start() 723 int pin; in mv_gpio_debounce() local 731 pin = s->pin; in mv_gpio_debounce() 998 uint32_t reg, pin; in mv_gpio_int_ack() local 1001 pin = s->pin; in mv_gpio_int_ack() 1028 return ((reg_val & GPIO(pin)) ^ (polar_reg_val & GPIO(pin))); in mv_gpio_value_get() [all …]
|
/freebsd/sys/dev/amdgpio/ |
H A D | amdgpio.c | 84 reg = AMDGPIO_PIN_REGISTER(pin); in amdgpio_is_pin_output() 124 dprintf("pin %d\n", pin); in amdgpio_valid_pin() 128 if ((sc->sc_gpio_pins[pin].gp_pin == pin) && in amdgpio_valid_pin() 140 dprintf("pin %d\n", pin); in amdgpio_pin_getname() 162 dprintf("pin %d\n", pin); in amdgpio_pin_getcaps() 180 dprintf("pin %d\n", pin); in amdgpio_pin_getflags() 238 pin, flags, val, sc->sc_gpio_pins[pin].gp_flags); in amdgpio_pin_setflags() 253 dprintf("pin %d\n", pin); in amdgpio_pin_get() 325 dprintf("pin %d\n", pin); in amdgpio_pin_toggle() 366 int i, pin, bank; in amdgpio_attach() local [all …]
|
/freebsd/sys/contrib/device-tree/src/arm64/actions/ |
H A D | s900-bubblegum-96.dts | 94 "GPIO-A", /* GPIO_0, LSEC pin 23 */ 95 "GPIO-B", /* GPIO_1, LSEC pin 24 */ 96 "GPIO-C", /* GPIO_2, LSEC pin 25 */ 97 "GPIO-D", /* GPIO_3, LSEC pin 26 */ 98 "GPIO-E", /* GPIO_4, LSEC pin 27 */ 99 "GPIO-F", /* GPIO_5, LSEC pin 28 */ 100 "GPIO-G", /* GPIO_6, LSEC pin 29 */ 101 "GPIO-H", /* GPIO_7, LSEC pin 30 */ 102 "GPIO-I", /* GPIO_8, LSEC pin 31 */ 103 "GPIO-J", /* GPIO_9, LSEC pin 32 */ [all …]
|
/freebsd/usr.sbin/bhyve/amd64/ |
H A D | pci_irq.c | 93 assert(pin > 0 && pin <= NPIRQS); in pirq_read() 102 assert(pin > 0 && pin <= NPIRQS); in pirq_write() 158 int pin; in pci_irq_assert() local 161 if (pin > 0) { in pci_irq_assert() 181 int pin; in pci_irq_deassert() local 184 if (pin > 0) { in pci_irq_deassert() 215 for (pin = 1; pin < NPIRQS; pin++) { in pirq_alloc_pin() 248 assert(pin > 0 && pin <= NPIRQS); in pirq_irq() 278 int irq, pin; in pirq_dsdt() local 320 for (pin = 0; pin < NPIRQS; pin++) { in pirq_dsdt() [all …]
|
/freebsd/sys/contrib/device-tree/src/arm64/tesla/ |
H A D | fsd-pinctrl.dtsi | 57 samsung,pin-pud = <FSD_PIN_PULL_DOWN>; 58 samsung,pin-drv = <FSD_PIN_DRV_LV4>; 64 samsung,pin-pud = <FSD_PIN_PULL_UP>; 65 samsung,pin-drv = <FSD_PIN_DRV_LV4>; 241 samsung,pin-pud = <FSD_PIN_PULL_UP>; 242 samsung,pin-drv = <FSD_PIN_DRV_LV4>; 248 samsung,pin-pud = <FSD_PIN_PULL_UP>; 249 samsung,pin-drv = <FSD_PIN_DRV_LV4>; 255 samsung,pin-pud = <FSD_PIN_PULL_UP>; 256 samsung,pin-drv = <FSD_PIN_DRV_LV4>; [all …]
|
/freebsd/sys/arm/xilinx/ |
H A D | zy7_gpio.c | 107 #define ZYNQ_PIN_IS_MIO(type, pin) (pin >= ZYNQ##type##_PIN_MIO_MIN && \ argument 109 #define ZYNQ_PIN_IS_EMIO(type, pin) (pin >= ZYNQ##type##_PIN_EMIO_MIN && \ argument 230 if (pin >= sc->conf->bank_min[i] && pin <= sc->conf->bank_max[i]) { in zy7_pin_valid() 298 if ((RD4(sc, ZY7_GPIO_DIRM(pin >> 5)) & (1 << (pin & 31))) != 0) { in zy7_gpio_pin_getflags() 300 if ((RD4(sc, ZY7_GPIO_OEN(pin >> 5)) & (1 << (pin & 31))) == 0) in zy7_gpio_pin_getflags() 327 RD4(sc, ZY7_GPIO_DIRM(pin >> 5)) | (1 << (pin & 31))); in zy7_gpio_pin_setflags() 340 RD4(sc, ZY7_GPIO_DIRM(pin >> 5)) & ~(1 << (pin & 31))); in zy7_gpio_pin_setflags() 342 RD4(sc, ZY7_GPIO_OEN(pin >> 5)) & ~(1 << (pin & 31))); in zy7_gpio_pin_setflags() 360 if ((pin & 16) != 0) in zy7_gpio_pin_set() 381 *value = (RD4(sc, ZY7_GPIO_DATA_RO(pin >> 5)) >> (pin & 31)) & 1; in zy7_gpio_pin_get() [all …]
|