Searched refs:PGLUE_REG_B_CACHE_LINE_SIZE_RT_OFFSET (Results 1 – 2 of 2) sorted by relevance
131 #define PGLUE_REG_B_CACHE_LINE_SIZE_RT_OFFSET 28705 macro
1377 STORE_RT_REG(p_hwfn, PGLUE_REG_B_CACHE_LINE_SIZE_RT_OFFSET, val); in ecore_init_cache_line_size()