Searched refs:EXYNOS5_PAD_RETENTION_DRAM_SYS_PWR_REG (Results 1 – 3 of 3) sorted by relevance
70 { EXYNOS5_PAD_RETENTION_DRAM_SYS_PWR_REG, { 0x1, 0x0, 0x0} },
83 { EXYNOS5_PAD_RETENTION_DRAM_SYS_PWR_REG, { 0x1, 0x0, 0x0} },
413 #define EXYNOS5_PAD_RETENTION_DRAM_SYS_PWR_REG 0x1200 macro