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Searched refs:HECI_H_CSR (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/i915/gt/uc/
H A Dintel_gsc_proxy.c282 intel_uncore_rmw(gt->uncore, HECI_H_CSR(MTL_GSC_HECI2_BASE), in intel_gsc_proxy_request_handler()
318 intel_uncore_rmw(gt->uncore, HECI_H_CSR(MTL_GSC_HECI2_BASE), in i915_gsc_proxy_component_bind()
344 intel_uncore_rmw(gt->uncore, HECI_H_CSR(MTL_GSC_HECI2_BASE), in i915_gsc_proxy_component_unbind()
/linux/drivers/gpu/drm/xe/regs/
H A Dxe_gsc_regs.h19 #define HECI_H_CSR(base) XE_REG((base) + 0x4) macro
/linux/drivers/gpu/drm/xe/
H A Dxe_gsc_proxy.c81 xe_mmio_rmw32(gt, HECI_H_CSR(MTL_GSC_HECI2_BASE), clr, set); in __gsc_proxy_irq_rmw()
H A Dxe_gsc.c588 xe_mmio_rmw32(gt, HECI_H_CSR(MTL_GSC_HECI2_BASE), in xe_gsc_wa_14015076503()
/linux/drivers/gpu/drm/i915/gt/
H A Dintel_reset.c748 HECI_H_CSR(MTL_GSC_HECI2_BASE), in wa_14015076503_start()
/linux/drivers/gpu/drm/i915/
H A Di915_reg.h327 #define HECI_H_CSR(base) _MMIO((base) + 0x4) macro