Searched refs:INTEL_PMC_IDX_FIXED (Results 1 – 7 of 7) sorted by relevance
13 #define INTEL_PMC_IDX_FIXED 32 macro298 #define INTEL_PMC_IDX_FIXED_INSTRUCTIONS (INTEL_PMC_IDX_FIXED + 0)302 #define INTEL_PMC_IDX_FIXED_CPU_CYCLES (INTEL_PMC_IDX_FIXED + 1)306 #define INTEL_PMC_IDX_FIXED_REF_CYCLES (INTEL_PMC_IDX_FIXED + 2)311 #define INTEL_PMC_IDX_FIXED_SLOTS (INTEL_PMC_IDX_FIXED + 3)330 #define INTEL_PMC_IDX_FIXED_BTS (INTEL_PMC_IDX_FIXED + 15)338 #define INTEL_PMC_IDX_METRIC_BASE (INTEL_PMC_IDX_FIXED + 16)
291 int idx = hwc->idx - INTEL_PMC_IDX_FIXED; in zhaoxin_pmu_disable_fixed()315 int idx = hwc->idx - INTEL_PMC_IDX_FIXED; in zhaoxin_pmu_enable_fixed()608 x86_pmu.intel_ctrl |= x86_pmu.fixed_cntr_mask64 << INTEL_PMC_IDX_FIXED; in zhaoxin_pmu_init()
1428 if (hwc->idx >= INTEL_PMC_IDX_FIXED) { in intel_pmu_pebs_via_pt_enable()1430 idx = hwc->idx - INTEL_PMC_IDX_FIXED; in intel_pmu_pebs_via_pt_enable()1482 if (idx >= INTEL_PMC_IDX_FIXED) { in intel_pmu_pebs_enable()1484 idx = MAX_PEBS_EVENTS_FMT4 + (idx - INTEL_PMC_IDX_FIXED); in intel_pmu_pebs_enable()1486 idx = MAX_PEBS_EVENTS + (idx - INTEL_PMC_IDX_FIXED); in intel_pmu_pebs_enable()2275 short counts[INTEL_PMC_IDX_FIXED + MAX_FIXED_PEBS_EVENTS] = {}; in intel_pmu_drain_pebs_nhm()2276 short error[INTEL_PMC_IDX_FIXED + MAX_FIXED_PEBS_EVENTS] = {}; in intel_pmu_drain_pebs_nhm()2292 mask |= x86_pmu.fixed_cntr_mask64 << INTEL_PMC_IDX_FIXED; in intel_pmu_drain_pebs_nhm()2293 size = INTEL_PMC_IDX_FIXED + x86_pmu_max_num_counters_fixed(NULL); in intel_pmu_drain_pebs_nhm()2387 short counts[INTEL_PMC_IDX_FIXED + MAX_FIXED_PEBS_EVENTS] = {}; in intel_pmu_drain_pebs_icl()[all …]
2545 mask = intel_fixed_bits_by_idx(idx - INTEL_PMC_IDX_FIXED, INTEL_FIXED_BITS_MASK); in intel_pmu_disable_fixed()2555 case 0 ... INTEL_PMC_IDX_FIXED - 1: in intel_pmu_disable_event()2559 case INTEL_PMC_IDX_FIXED ... INTEL_PMC_IDX_FIXED_BTS - 1: in intel_pmu_disable_event()2841 idx -= INTEL_PMC_IDX_FIXED; in intel_pmu_enable_fixed()2864 case 0 ... INTEL_PMC_IDX_FIXED - 1: in intel_pmu_enable_event()2870 case INTEL_PMC_IDX_FIXED ... INTEL_PMC_IDX_FIXED_BTS - 1: in intel_pmu_enable_event()4836 *intel_ctrl |= *fixed_cntr_mask << INTEL_PMC_IDX_FIXED; in intel_pmu_check_counters_mask()6210 c->idxmsk64 &= cntr_mask | (fixed_cntr_mask << INTEL_PMC_IDX_FIXED); in intel_pmu_check_event_constraints()6291 if (!(x86_pmu.events_maskl & (INTEL_PMC_MSK_FIXED_REF_CYCLES >> INTEL_PMC_IDX_FIXED))) in intel_pmu_ref_cycles_ext()
881 if (c->idxmsk64 & (~0ULL << INTEL_PMC_IDX_FIXED)) { in __perf_sched_find_counter()882 idx = INTEL_PMC_IDX_FIXED; in __perf_sched_find_counter()896 for_each_set_bit_from(idx, c->idxmsk, INTEL_PMC_IDX_FIXED) { in __perf_sched_find_counter()1239 case INTEL_PMC_IDX_FIXED ... INTEL_PMC_IDX_FIXED_BTS-1: in x86_assign_hw_event()1241 hwc->event_base = x86_pmu_fixed_ctr_addr(idx - INTEL_PMC_IDX_FIXED); in x86_assign_hw_event()1242 hwc->event_base_rdpmc = (idx - INTEL_PMC_IDX_FIXED) | in x86_assign_hw_event()2484 if (i >= INTEL_PMC_IDX_FIXED) { in perf_clear_dirty_counters()2486 if (!test_bit(i - INTEL_PMC_IDX_FIXED, hybrid(cpuc->pmu, fixed_cntr_mask))) in perf_clear_dirty_counters()2489 wrmsrl(x86_pmu_fixed_ctr_addr(i - INTEL_PMC_IDX_FIXED), 0); in perf_clear_dirty_counters()
1370 return !(intel_ctrl >> (i + INTEL_PMC_IDX_FIXED)); in fixed_counter_disabled()
24 #define KVM_FIXED_PMC_BASE_IDX INTEL_PMC_IDX_FIXED