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Searched refs:NUM_DCFCLK_DPM_LEVELS (Results 1 – 17 of 17) sorted by relevance

/linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/
H A Dsmu14_driver_if_v14_0_0.h99 #define NUM_DCFCLK_DPM_LEVELS 8 macro
121 uint32_t DcfClocks[NUM_DCFCLK_DPM_LEVELS];
150 uint32_t DcfClocks[NUM_DCFCLK_DPM_LEVELS];
H A Dsmu13_driver_if_v13_0_5.h43 #define NUM_DCFCLK_DPM_LEVELS 4 macro
111 uint32_t DcfClocks[NUM_DCFCLK_DPM_LEVELS];
H A Dsmu12_driver_if.h105 #define NUM_DCFCLK_DPM_LEVELS 8 macro
117 DpmClock_t DcfClocks[NUM_DCFCLK_DPM_LEVELS];
H A Dsmu13_driver_if_yellow_carp.h103 #define NUM_DCFCLK_DPM_LEVELS 8 macro
122 uint32_t DcfClocks[NUM_DCFCLK_DPM_LEVELS];
H A Dsmu11_driver_if_vangogh.h103 #define NUM_DCFCLK_DPM_LEVELS 7 macro
128 uint32_t DcfClocks[NUM_DCFCLK_DPM_LEVELS];
H A Dsmu13_driver_if_v13_0_4.h104 #define NUM_DCFCLK_DPM_LEVELS 8 macro
123 uint32_t DcfClocks[NUM_DCFCLK_DPM_LEVELS];
H A Dsmu13_driver_if_v13_0_0.h40 #define NUM_DCFCLK_DPM_LEVELS 8 macro
1049 uint16_t FreqTableDcfclk [NUM_DCFCLK_DPM_LEVELS ]; // In MHz
1409 uint16_t FreqTableDcfclk [NUM_DCFCLK_DPM_LEVELS ]; // In MHz
H A Dsmu13_driver_if_v13_0_7.h41 #define NUM_DCFCLK_DPM_LEVELS 8 macro
1058 uint16_t FreqTableDcfclk [NUM_DCFCLK_DPM_LEVELS ]; // In MHz
1402 uint16_t FreqTableDcfclk [NUM_DCFCLK_DPM_LEVELS ]; // In MHz
H A Dsmu14_driver_if_v14_0.h38 #define NUM_DCFCLK_DPM_LEVELS 8 macro
1149 uint16_t FreqTableDcfclk [NUM_DCFCLK_DPM_LEVELS ]; // In MHz
1634 uint16_t FreqTableDcfclk [NUM_DCFCLK_DPM_LEVELS ]; // In MHz
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/
H A Ddcn315_smu.h32 #define NUM_DCFCLK_DPM_LEVELS 4 macro
70 uint32_t DcfClocks[NUM_DCFCLK_DPM_LEVELS];
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/
H A Ddcn316_smu.h32 #define NUM_DCFCLK_DPM_LEVELS 8 macro
78 uint32_t DcfClocks[NUM_DCFCLK_DPM_LEVELS];
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/
H A Ddcn35_smu.h76 #define NUM_DCFCLK_DPM_LEVELS 8 macro
104 uint32_t DcfClocks[NUM_DCFCLK_DPM_LEVELS];
H A Ddcn35_clk_mgr.c839 …num_dcfclk = (clock_table->NumDcfClkLevelsEnabled > NUM_DCFCLK_DPM_LEVELS) ? NUM_DCFCLK_DPM_LEVELS in dcn35_clk_mgr_helper_populate_bw_params()
876 find_max_clk_value(clock_table->DcfClocks, NUM_DCFCLK_DPM_LEVELS); in dcn35_clk_mgr_helper_populate_bw_params()
896 …RT(clock_table->DcfClocks[i] == find_max_clk_value(clock_table->DcfClocks, NUM_DCFCLK_DPM_LEVELS)); in dcn35_clk_mgr_helper_populate_bw_params()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
H A Ddcn31_smu.h105 #define NUM_DCFCLK_DPM_LEVELS 8 macro
131 uint32_t DcfClocks[NUM_DCFCLK_DPM_LEVELS];
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
H A Ddcn314_smu.h50 uint32_t DcfClocks[NUM_DCFCLK_DPM_LEVELS];
H A Ddcn314_clk_mgr.c691 …lk_table.entries[i].dcfclk_mhz = find_max_clk_value(clock_table->DcfClocks, NUM_DCFCLK_DPM_LEVELS); in dcn314_clk_mgr_helper_populate_bw_params()
705 …RT(clock_table->DcfClocks[i] == find_max_clk_value(clock_table->DcfClocks, NUM_DCFCLK_DPM_LEVELS)); in dcn314_clk_mgr_helper_populate_bw_params()
/linux/drivers/gpu/drm/amd/pm/swsmu/smu12/
H A Drenoir_ppt.c223 if (dpm_level >= NUM_DCFCLK_DPM_LEVELS) in renoir_get_dpm_clk_limited()
568 count = NUM_DCFCLK_DPM_LEVELS; in renoir_print_clk_levels()
762 for (i = 0; i < NUM_DCFCLK_DPM_LEVELS; i++) { in renoir_get_dpm_clock_table()