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Searched refs:UVD_LMI_STATUS__UMC_UVD_IDLE_MASK (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_3_1_sh_mask.h397 #define UVD_LMI_STATUS__UMC_UVD_IDLE_MASK 0x400 macro
H A Duvd_4_2_sh_mask.h401 #define UVD_LMI_STATUS__UMC_UVD_IDLE_MASK 0x400 macro
H A Duvd_4_0_sh_mask.h372 #define UVD_LMI_STATUS__UMC_UVD_IDLE_MASK 0x00000400L macro
H A Duvd_5_0_sh_mask.h433 #define UVD_LMI_STATUS__UMC_UVD_IDLE_MASK 0x400 macro
H A Duvd_6_0_sh_mask.h435 #define UVD_LMI_STATUS__UMC_UVD_IDLE_MASK 0x400 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_2_5_sh_mask.h3409 #define UVD_LMI_STATUS__UMC_UVD_IDLE_MASK … macro
H A Dvcn_2_0_0_sh_mask.h2458 #define UVD_LMI_STATUS__UMC_UVD_IDLE_MASK … macro
H A Dvcn_2_6_0_sh_mask.h1004 #define UVD_LMI_STATUS__UMC_UVD_IDLE_MASK … macro
H A Dvcn_3_0_0_sh_mask.h4731 #define UVD_LMI_STATUS__UMC_UVD_IDLE_MASK … macro
H A Dvcn_5_0_0_sh_mask.h4293 #define UVD_LMI_STATUS__UMC_UVD_IDLE_MASK … macro
H A Dvcn_4_0_5_sh_mask.h4721 #define UVD_LMI_STATUS__UMC_UVD_IDLE_MASK … macro
H A Dvcn_4_0_0_sh_mask.h4880 #define UVD_LMI_STATUS__UMC_UVD_IDLE_MASK … macro
H A Dvcn_4_0_3_sh_mask.h4923 #define UVD_LMI_STATUS__UMC_UVD_IDLE_MASK … macro