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Searched refs:UVD_VCPU_CACHE_SIZE3__CACHE_SIZE3__SHIFT (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_2_5_sh_mask.h2697 #define UVD_VCPU_CACHE_SIZE3__CACHE_SIZE3__SHIFT … macro
H A Dvcn_2_0_0_sh_mask.h2693 #define UVD_VCPU_CACHE_SIZE3__CACHE_SIZE3__SHIFT … macro
H A Dvcn_2_6_0_sh_mask.h50 #define UVD_VCPU_CACHE_SIZE3__CACHE_SIZE3__SHIFT … macro
H A Dvcn_3_0_0_sh_mask.h3755 #define UVD_VCPU_CACHE_SIZE3__CACHE_SIZE3__SHIFT … macro
H A Dvcn_5_0_0_sh_mask.h3699 #define UVD_VCPU_CACHE_SIZE3__CACHE_SIZE3__SHIFT … macro
H A Dvcn_4_0_5_sh_mask.h3867 #define UVD_VCPU_CACHE_SIZE3__CACHE_SIZE3__SHIFT … macro
H A Dvcn_4_0_0_sh_mask.h4001 #define UVD_VCPU_CACHE_SIZE3__CACHE_SIZE3__SHIFT … macro
H A Dvcn_4_0_3_sh_mask.h4036 #define UVD_VCPU_CACHE_SIZE3__CACHE_SIZE3__SHIFT … macro