/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/ |
H A D | dcn316_clk_mgr.c | 391 table->WatermarkRow[WM_SOCCLK][0].WmSetting = WM_A; in dcn316_build_watermark_ranges() 392 table->WatermarkRow[WM_SOCCLK][0].MinClock = 0; in dcn316_build_watermark_ranges() 393 table->WatermarkRow[WM_SOCCLK][0].MaxClock = 0xFFFF; in dcn316_build_watermark_ranges() 394 table->WatermarkRow[WM_SOCCLK][0].MinMclk = 0; in dcn316_build_watermark_ranges() 395 table->WatermarkRow[WM_SOCCLK][0].MaxMclk = 0xFFFF; in dcn316_build_watermark_ranges()
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H A D | dcn316_smu.h | 55 WM_SOCCLK = 0, enumerator
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/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/ |
H A D | dcn30_smu11_driver_if.h | 39 WM_SOCCLK = 0, enumerator
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/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/ |
H A D | vg_clk_mgr.c | 434 table->WatermarkRow[WM_SOCCLK][0].WmSetting = WM_A; in vg_build_watermark_ranges() 435 table->WatermarkRow[WM_SOCCLK][0].MinClock = 0; in vg_build_watermark_ranges() 436 table->WatermarkRow[WM_SOCCLK][0].MaxClock = 0xFFFF; in vg_build_watermark_ranges() 437 table->WatermarkRow[WM_SOCCLK][0].MinMclk = 0; in vg_build_watermark_ranges() 438 table->WatermarkRow[WM_SOCCLK][0].MaxMclk = 0xFFFF; in vg_build_watermark_ranges()
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H A D | dcn301_smu.h | 70 WM_SOCCLK = 0, enumerator
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/linux/drivers/gpu/drm/amd/pm/powerplay/inc/ |
H A D | smu10_driver_if.h | 64 WM_SOCCLK = 0, enumerator
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H A D | smu9_driver_if.h | 342 WM_SOCCLK = 0, enumerator
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/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/ |
H A D | dcn31_clk_mgr.c | 469 table->WatermarkRow[WM_SOCCLK][0].WmSetting = WM_A; in dcn31_build_watermark_ranges() 470 table->WatermarkRow[WM_SOCCLK][0].MinClock = 0; in dcn31_build_watermark_ranges() 471 table->WatermarkRow[WM_SOCCLK][0].MaxClock = 0xFFFF; in dcn31_build_watermark_ranges() 472 table->WatermarkRow[WM_SOCCLK][0].MinMclk = 0; in dcn31_build_watermark_ranges() 473 table->WatermarkRow[WM_SOCCLK][0].MaxMclk = 0xFFFF; in dcn31_build_watermark_ranges()
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H A D | dcn31_smu.h | 67 WM_SOCCLK = 0, enumerator
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/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/ |
H A D | dcn315_clk_mgr.c | 429 table->WatermarkRow[WM_SOCCLK][0].WmSetting = WM_A; in dcn315_build_watermark_ranges() 430 table->WatermarkRow[WM_SOCCLK][0].MinClock = 0; in dcn315_build_watermark_ranges() 431 table->WatermarkRow[WM_SOCCLK][0].MaxClock = 0xFFFF; in dcn315_build_watermark_ranges() 432 table->WatermarkRow[WM_SOCCLK][0].MinMclk = 0; in dcn315_build_watermark_ranges() 433 table->WatermarkRow[WM_SOCCLK][0].MaxMclk = 0xFFFF; in dcn315_build_watermark_ranges()
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H A D | dcn315_smu.h | 56 WM_SOCCLK = 0, enumerator
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/linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/ |
H A D | smu13_driver_if_v13_0_5.h | 66 WM_SOCCLK = 0, enumerator
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H A D | smu12_driver_if.h | 66 WM_SOCCLK = 0, enumerator
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H A D | smu13_driver_if_yellow_carp.h | 65 WM_SOCCLK = 0, enumerator
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H A D | smu11_driver_if_vangogh.h | 65 WM_SOCCLK = 0, enumerator
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H A D | smu13_driver_if_v13_0_4.h | 66 WM_SOCCLK = 0, enumerator
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H A D | smu14_driver_if_v14_0_0.h | 61 WM_SOCCLK = 0, enumerator
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/linux/drivers/gpu/drm/amd/pm/swsmu/smu13/ |
H A D | smu_v13_0_5_ppt.c | 436 table->WatermarkRow[WM_SOCCLK][i].MinClock = in smu_v13_0_5_set_watermarks_table() 438 table->WatermarkRow[WM_SOCCLK][i].MaxClock = in smu_v13_0_5_set_watermarks_table() 440 table->WatermarkRow[WM_SOCCLK][i].MinMclk = in smu_v13_0_5_set_watermarks_table() 442 table->WatermarkRow[WM_SOCCLK][i].MaxMclk = in smu_v13_0_5_set_watermarks_table() 445 table->WatermarkRow[WM_SOCCLK][i].WmSetting = in smu_v13_0_5_set_watermarks_table()
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H A D | smu_v13_0_4_ppt.c | 692 table->WatermarkRow[WM_SOCCLK][i].MinClock = in smu_v13_0_4_set_watermarks_table() 694 table->WatermarkRow[WM_SOCCLK][i].MaxClock = in smu_v13_0_4_set_watermarks_table() 696 table->WatermarkRow[WM_SOCCLK][i].MinMclk = in smu_v13_0_4_set_watermarks_table() 698 table->WatermarkRow[WM_SOCCLK][i].MaxMclk = in smu_v13_0_4_set_watermarks_table() 701 table->WatermarkRow[WM_SOCCLK][i].WmSetting = in smu_v13_0_4_set_watermarks_table()
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H A D | yellow_carp_ppt.c | 527 table->WatermarkRow[WM_SOCCLK][i].MinClock = in yellow_carp_set_watermarks_table() 529 table->WatermarkRow[WM_SOCCLK][i].MaxClock = in yellow_carp_set_watermarks_table() 531 table->WatermarkRow[WM_SOCCLK][i].MinMclk = in yellow_carp_set_watermarks_table() 533 table->WatermarkRow[WM_SOCCLK][i].MaxMclk = in yellow_carp_set_watermarks_table() 536 table->WatermarkRow[WM_SOCCLK][i].WmSetting = in yellow_carp_set_watermarks_table()
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/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/ |
H A D | dcn314_clk_mgr.c | 534 table->WatermarkRow[WM_SOCCLK][0].WmSetting = WM_A; in dcn314_build_watermark_ranges() 535 table->WatermarkRow[WM_SOCCLK][0].MinClock = 0; in dcn314_build_watermark_ranges() 536 table->WatermarkRow[WM_SOCCLK][0].MaxClock = 0xFFFF; in dcn314_build_watermark_ranges() 537 table->WatermarkRow[WM_SOCCLK][0].MinMclk = 0; in dcn314_build_watermark_ranges() 538 table->WatermarkRow[WM_SOCCLK][0].MaxMclk = 0xFFFF; in dcn314_build_watermark_ranges()
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/linux/drivers/gpu/drm/amd/pm/swsmu/smu12/ |
H A D | renoir_ppt.c | 1110 table->WatermarkRow[WM_SOCCLK][i].MinClock = in renoir_set_watermarks_table() 1112 table->WatermarkRow[WM_SOCCLK][i].MaxClock = in renoir_set_watermarks_table() 1114 table->WatermarkRow[WM_SOCCLK][i].MinMclk = in renoir_set_watermarks_table() 1116 table->WatermarkRow[WM_SOCCLK][i].MaxMclk = in renoir_set_watermarks_table() 1119 table->WatermarkRow[WM_SOCCLK][i].WmSetting = in renoir_set_watermarks_table() 1121 table->WatermarkRow[WM_SOCCLK][i].WmType = in renoir_set_watermarks_table()
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/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/ |
H A D | dcn35_smu.h | 64 WM_SOCCLK = 0, enumerator
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H A D | dcn35_clk_mgr.c | 690 table->WatermarkRow[WM_SOCCLK][0].WmSetting = WM_A; in dcn35_build_watermark_ranges() 691 table->WatermarkRow[WM_SOCCLK][0].MinClock = 0; in dcn35_build_watermark_ranges() 692 table->WatermarkRow[WM_SOCCLK][0].MaxClock = 0xFFFF; in dcn35_build_watermark_ranges() 693 table->WatermarkRow[WM_SOCCLK][0].MinMclk = 0; in dcn35_build_watermark_ranges() 694 table->WatermarkRow[WM_SOCCLK][0].MaxMclk = 0xFFFF; in dcn35_build_watermark_ranges()
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/linux/drivers/gpu/drm/amd/pm/swsmu/smu14/ |
H A D | smu_v14_0_0_ppt.c | 511 table->WatermarkRow[WM_SOCCLK][i].MinClock = in smu_v14_0_0_set_watermarks_table() 513 table->WatermarkRow[WM_SOCCLK][i].MaxClock = in smu_v14_0_0_set_watermarks_table() 515 table->WatermarkRow[WM_SOCCLK][i].MinMclk = in smu_v14_0_0_set_watermarks_table() 517 table->WatermarkRow[WM_SOCCLK][i].MaxMclk = in smu_v14_0_0_set_watermarks_table() 520 table->WatermarkRow[WM_SOCCLK][i].WmSetting = in smu_v14_0_0_set_watermarks_table()
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