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/linux/drivers/clk/actions/
H A Dowl-composite.h38 _mux, _gate, _div, _flags) \ argument
42 .rate.div_hw = _div, \
53 _gate, _div, _flags) \ argument
56 .rate.div_hw = _div, \
82 _gate, _mul, _div, _flags) \ argument
86 .rate.fix_fact_hw.div = _div, \
H A Dowl-fixed-factor.h16 #define OWL_FIX_FACT(_struct, _name, _parent, _mul, _div, _flags) \ argument
19 .div = _div, \
/linux/drivers/clk/renesas/
H A Drcar-gen3-cpg.h53 #define DEF_GEN3_OSC(_name, _id, _parent, _div) \ argument
54 DEF_BASE(_name, _id, CLK_TYPE_GEN3_OSC, _parent, .div = _div)
60 #define DEF_GEN3_Z(_name, _id, _type, _parent, _div, _offset) \ argument
61 DEF_BASE(_name, _id, _type, _parent, .div = _div, .offset = _offset)
H A Drcar-gen4-cpg.h46 #define DEF_GEN4_OSC(_name, _id, _parent, _div) \ argument
47 DEF_BASE(_name, _id, CLK_TYPE_GEN4_OSC, _parent, .div = _div)
61 #define DEF_GEN4_Z(_name, _id, _type, _parent, _div, _offset) \ argument
62 DEF_BASE(_name, _id, _type, _parent, .div = _div, .offset = _offset)
H A Drenesas-cpg-mssr.h51 #define DEF_FIXED(_name, _id, _parent, _div, _mult) \ argument
52 DEF_BASE(_name, _id, CLK_TYPE_FF, _parent, .div = _div, .mult = _mult)
55 #define DEF_DIV6_RO(_name, _id, _parent, _offset, _div) \ argument
56 DEF_BASE(_name, _id, CLK_TYPE_DIV6_RO, _parent, .offset = _offset, .div = _div, .mult = 1)
H A Drzv2h-cpg.h83 #define DEF_FIXED(_name, _id, _parent, _mult, _div) \ argument
84 DEF_BASE(_name, _id, CLK_TYPE_FF, _parent, .div = _div, .mult = _mult)
H A Drzg2l-cpg.h151 #define DEF_FIXED(_name, _id, _parent, _mult, _div) \ argument
152 DEF_BASE(_name, _id, CLK_TYPE_FF, _parent, .div = _div, .mult = _mult)
H A Dr9a06g032-clocks.c180 #define D_ROOT(_idx, _n, _mul, _div) { \ argument
184 .ffc.div = _div, \
187 #define D_FFC(_idx, _n, _src, _div) { \ argument
192 .ffc.div = _div, \
H A Drzv2h-cpg.c130 #define to_ddiv_clock(_div) container_of(_div, struct ddiv_clk, div) argument
/linux/drivers/clk/mediatek/
H A Dclk-mtk.h72 #define FACTOR_FLAGS(_id, _name, _parent, _mult, _div, _fl) { \ argument
77 .div = _div, \
81 #define FACTOR(_id, _name, _parent, _mult, _div) \ argument
82 FACTOR_FLAGS(_id, _name, _parent, _mult, _div, CLK_SET_RATE_PARENT)
/linux/drivers/comedi/drivers/
H A Ddt2811.c314 unsigned int _div; in dt2811_ns_to_timer() local
321 for (_div = 0; _div <= 7; _div++) { in dt2811_ns_to_timer()
323 unsigned int div = dt2811_clk_dividers[_div]; in dt2811_ns_to_timer()
326 unsigned int divisor = DT2811_TMRCTR_MANTISSA(_div) | in dt2811_ns_to_timer()
/linux/drivers/clk/pistachio/
H A Dclk.h86 #define FIXED_FACTOR(_id, _name, _pname, _div) \ argument
89 .div = _div, \
/linux/drivers/clk/uniphier/
H A Dclk-uniphier.h83 #define UNIPHIER_CLK_FACTOR(_name, _idx, _parent, _mult, _div) \ argument
91 .div = (_div), \
/linux/drivers/clk/qcom/
H A Dclk-rpmh.c73 _res_en_offset, _res_on, _div) \ argument
79 .div = _div, \
98 .div = _div, \
113 #define DEFINE_CLK_RPMH_ARC(_name, _res_name, _res_on, _div) \ argument
114 __DEFINE_CLK_RPMH(_name, _name##_##div##_div, _res_name, \
115 CLK_RPMH_ARC_EN_OFFSET, _res_on, _div)
117 #define DEFINE_CLK_RPMH_VRM(_name, _suffix, _res_name, _div) \ argument
119 CLK_RPMH_VRM_EN_OFFSET, 1, _div)
/linux/include/linux/
H A Dclk-provider.h1524 _div, _mult, _flags) \ argument
1526 .div = _div, \
1535 _div, _mult, _flags) \ argument
1537 .div = _div, \
1550 _div, _mult, _flags) \ argument
1552 .div = _div, \
1561 _div, _mult, _flags) \ argument
1563 .div = _div, \
/linux/Documentation/hwmon/
H A Dmax6620.rst35 fan[1-4]_div rw Sets the nominal RPM range of the fan. Valid values
/linux/drivers/spi/
H A Dspi-meson-spicc.c176 #define pow2_clk_to_spicc(_div) container_of(_div, struct meson_spicc_device, pow2_div) argument
/linux/drivers/clk/ralink/
H A Dclk-mtmips.c313 #define CLK_FACTOR(_name, _parent, _mult, _div) \ argument
318 .div = _div, \
/linux/drivers/clk/nxp/
H A Dclk-lpc32xx.c1206 #define LPC32XX_DEFINE_COMPOSITE(_idx, _mux, _div, _gate) \ argument
1213 .div = (CLK_PREFIX(_div) == LPC32XX_CLK__NULL ? NULL : \
1214 &clk_hw_proto[CLK_PREFIX(_div)].hw0), \
/linux/drivers/clk/stm32/
H A Dclk-stm32mp1.c1184 #define FIXED_FACTOR(_id, _name, _parent, _flags, _mult, _div)\ argument
1192 .div = _div,\
1368 #define COMPOSITE(_id, _name, _parents, _flags, _gate, _mux, _div)\ argument
1378 _div,\
/linux/drivers/clk/
H A Dclk-stm32f4.c700 #define to_pll_div_clk(_div) container_of(_div, struct stm32f4_pll_div, div) argument
/linux/drivers/clk/rockchip/
H A Dclk-rk3576.c135 #define RK3576_CCI_CLKSEL4(_ccisel, _div) \ argument
140 HIWORD_UPDATE(_div - 1, RK3576_ACLK_CCI_DIV_MASK, \
/linux/drivers/hwmon/
H A Dasb100.c393 static SENSOR_DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, \
H A Dvt1211.c1005 SENSOR_ATTR_2(fan##ix##_div, S_IRUGO | S_IWUSR, \
/linux/drivers/clk/meson/
H A Daxg-audio.c192 AUD_DIV(_name##_div, _reg, 0, 16, _flag, \
195 AUD_GATE(_name, _reg, 31, aud_##_name##_div, \

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