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Searched refs:endianness (Results 1 – 25 of 524) sorted by relevance

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/linux/Documentation/devicetree/bindings/mips/lantiq/
H A Dfpi-bus.txt13 - lantiq,offset-endianness : Offset of the endianness configuration
24 lantiq,offset-endianness = <0x4c>;
/linux/drivers/input/joystick/
H A Dadc-joystick.c57 enum iio_endian endianness; in adc_joystick_handle() local
66 endianness = joy->chans[i].channel->scan_type.endianness; in adc_joystick_handle()
81 if (endianness == IIO_BE) in adc_joystick_handle()
83 else if (endianness == IIO_LE) in adc_joystick_handle()
/linux/Documentation/devicetree/bindings/
H A Dcommon-properties.txt8 byte swapping, but endianness issues show up frequently in porting drivers to
20 endianness of the kernel binary (e.g. LE vmlinux -> readl/writel,
23 register endianness based on the CPU's configured endianness.
/linux/Documentation/devicetree/bindings/pwm/
H A Dfsl,vf610-ftm-pwm.yaml10 The same FTM PWM device can have a different endianness on different SoCs. The
13 for the endianness of the FTM PWM block as integrated into the existing SoCs:
15 SoC | FTM-PWM endianness
/linux/drivers/iio/pressure/
H A Dst_pressure_core.c133 .endianness = IIO_LE,
147 .endianness = IIO_LE,
167 .endianness = IIO_LE,
181 .endianness = IIO_LE,
199 .endianness = IIO_LE,
214 .endianness = IIO_LE,
/linux/drivers/iio/adc/
H A Drtq6056.c133 .endianness = IIO_CPU,
152 .endianness = IIO_CPU,
170 .endianness = IIO_CPU,
187 .endianness = IIO_CPU,
216 .endianness = IIO_CPU,
234 .endianness = IIO_CPU,
252 .endianness = IIO_CPU,
269 .endianness = IIO_CPU,
H A Dad7380.c110 .endianness = IIO_CPU,
116 .endianness = IIO_CPU,
126 .endianness = IIO_CPU,
132 .endianness = IIO_CPU,
142 .endianness = IIO_CPU,
148 .endianness = IIO_CPU,
158 .endianness = IIO_CPU,
164 .endianness = IIO_CPU,
174 .endianness = IIO_CPU,
180 .endianness = IIO_CPU,
/linux/drivers/iio/temperature/
H A Dmaxim_thermocouple.c52 .endianness = IIO_BE,
71 .endianness = IIO_BE,
87 .endianness = IIO_BE,
/linux/drivers/iio/chemical/
H A Datlas-sensor.c125 .endianness = IIO_BE,
152 .endianness = IIO_BE, \
167 .endianness = IIO_BE,
194 .endianness = IIO_BE,
211 .endianness = IIO_BE,
235 .endianness = IIO_BE,
H A Datlas-ezo-sensor.c58 .endianness = IIO_CPU, \
80 .endianness = IIO_CPU,
H A Dvz89x.c95 .endianness = IIO_LE,
125 .endianness = IIO_BE,
247 switch (chan->scan_type.endianness) { in vz89x_get_resistance_reading()
/linux/drivers/iio/imu/
H A Dadis16400.c673 .endianness = IIO_BE, \
699 .endianness = IIO_BE, \
719 .endianness = IIO_BE, \
738 .endianness = IIO_BE, \
764 .endianness = IIO_BE, \
783 .endianness = IIO_BE, \
801 .endianness = IIO_BE, \
853 .endianness = IIO_BE,
/linux/drivers/i2c/busses/
H A Di2c-xiic.c89 enum xiic_endian endianness; member
251 if (i2c->endianness == LITTLE) in xiic_setreg8()
261 if (i2c->endianness == LITTLE) in xiic_getreg8()
270 if (i2c->endianness == LITTLE) in xiic_setreg16()
278 if (i2c->endianness == LITTLE) in xiic_setreg32()
288 if (i2c->endianness == LITTLE) in xiic_getreg32()
1308 i2c->endianness = LITTLE; in xiic_i2c_probe()
1313 i2c->endianness = BIG; in xiic_i2c_probe()
/linux/Documentation/ABI/testing/
H A Dsysfs-kernel-cpu_byteorder6 The endianness of the running kernel.
/linux/sound/soc/codecs/
H A Dpcm5102a.c30 .endianness = 1,
H A Dics43432.c43 .endianness = 1,
H A Dwm8727.c57 .endianness = 1,
H A Dad73311.c60 .endianness = 1,
H A Dspdif_receiver.c46 .endianness = 1,
H A Dak4554.c69 .endianness = 1,
/linux/include/linux/iio/imu/
H A Dadis.h428 .endianness = IIO_BE, \
452 .endianness = IIO_BE, \
470 .endianness = IIO_BE, \
/linux/drivers/iio/humidity/
H A Dam2315.c57 .endianness = IIO_CPU,
69 .endianness = IIO_CPU,
/linux/drivers/iio/magnetometer/
H A Dtmag5273.c413 .endianness = IIO_CPU, \
429 .endianness = IIO_CPU,
449 .endianness = IIO_CPU,
465 .endianness = IIO_CPU,
/linux/arch/mips/include/uapi/asm/
H A Dmsgbuf.h65 #warning no endianness set
/linux/Documentation/core-api/
H A Dpacking.rst13 due to potential endianness mismatches between the CPU and the hardware device.
22 still not protect from endianness mismatches, except if all memory accesses
40 over CPU endianness and therefore between possible mismatches between

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