Searched refs:sc_hiz_tile_fifo_size (Results 1 – 16 of 16) sorted by relevance
1210 rdev->config.rv770.sc_hiz_tile_fifo_size = 0x30; in rv770_gpu_init()1230 rdev->config.rv770.sc_hiz_tile_fifo_size = 0x30; in rv770_gpu_init()1254 rdev->config.rv770.sc_hiz_tile_fifo_size = 0x30; in rv770_gpu_init()1274 rdev->config.rv770.sc_hiz_tile_fifo_size = 0x30; in rv770_gpu_init()1450 SC_HIZ_TILE_FIFO_SIZE(rdev->config.rv770.sc_hiz_tile_fifo_size) | in rv770_gpu_init()
3173 rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; in evergreen_gpu_init()3195 rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; in evergreen_gpu_init()3217 rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; in evergreen_gpu_init()3240 rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; in evergreen_gpu_init()3262 rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; in evergreen_gpu_init()3290 rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; in evergreen_gpu_init()3312 rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; in evergreen_gpu_init()3334 rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; in evergreen_gpu_init()3356 rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; in evergreen_gpu_init()3378 rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; in evergreen_gpu_init()[all …]
2045 unsigned sc_hiz_tile_fifo_size; member2072 unsigned sc_hiz_tile_fifo_size; member2100 unsigned sc_hiz_tile_fifo_size; member2133 unsigned sc_hiz_tile_fifo_size; member2164 unsigned sc_hiz_tile_fifo_size; member
898 rdev->config.cayman.sc_hiz_tile_fifo_size = 0x30; in cayman_gpu_init()972 rdev->config.cayman.sc_hiz_tile_fifo_size = 0x30; in cayman_gpu_init()1175 SC_HIZ_TILE_FIFO_SIZE(rdev->config.cayman.sc_hiz_tile_fifo_size) | in cayman_gpu_init()
3092 rdev->config.si.sc_hiz_tile_fifo_size = 0x30; in si_gpu_init()3109 rdev->config.si.sc_hiz_tile_fifo_size = 0x30; in si_gpu_init()3127 rdev->config.si.sc_hiz_tile_fifo_size = 0x30; in si_gpu_init()3144 rdev->config.si.sc_hiz_tile_fifo_size = 0x30; in si_gpu_init()3161 rdev->config.si.sc_hiz_tile_fifo_size = 0x30; in si_gpu_init()3296 SC_HIZ_TILE_FIFO_SIZE(rdev->config.si.sc_hiz_tile_fifo_size) | in si_gpu_init()
3190 rdev->config.cik.sc_hiz_tile_fifo_size = 0x30; in cik_gpu_init()3207 rdev->config.cik.sc_hiz_tile_fifo_size = 0x30; in cik_gpu_init()3224 rdev->config.cik.sc_hiz_tile_fifo_size = 0x30; in cik_gpu_init()3243 rdev->config.cik.sc_hiz_tile_fifo_size = 0x30; in cik_gpu_init()3378 SC_HIZ_TILE_FIFO_SIZE(rdev->config.cik.sc_hiz_tile_fifo_size) | in cik_gpu_init()
1583 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v6_0_constants_init()1600 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v6_0_constants_init()1617 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v6_0_constants_init()1634 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v6_0_constants_init()1651 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v6_0_constants_init()1732 (adev->gfx.config.sc_hiz_tile_fifo_size << PA_SC_FIFO_SIZE__SC_HIZ_TILE_FIFO_SIZE__SHIFT) | in gfx_v6_0_constants_init()
199 unsigned sc_hiz_tile_fifo_size; member
1671 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v8_0_gpu_early_init()1688 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v8_0_gpu_early_init()1703 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v8_0_gpu_early_init()1718 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v8_0_gpu_early_init()1735 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v8_0_gpu_early_init()1752 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v8_0_gpu_early_init()1769 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v8_0_gpu_early_init()1786 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v8_0_gpu_early_init()3795 (adev->gfx.config.sc_hiz_tile_fifo_size << in gfx_v8_0_constants_init()
1978 (adev->gfx.config.sc_hiz_tile_fifo_size << PA_SC_FIFO_SIZE__SC_HIZ_TILE_FIFO_SIZE__SHIFT) | in gfx_v7_0_constants_init()4191 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v7_0_gpu_early_init()4208 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v7_0_gpu_early_init()4225 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v7_0_gpu_early_init()4244 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v7_0_gpu_early_init()
2020 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v9_0_gpu_early_init()2028 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v9_0_gpu_early_init()2038 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v9_0_gpu_early_init()2053 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v9_0_gpu_early_init()2065 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v9_0_gpu_early_init()2075 adev->gfx.config.sc_hiz_tile_fifo_size = 0x80; in gfx_v9_0_gpu_early_init()2086 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v9_0_gpu_early_init()
906 config[no_regs++] = adev->gfx.config.sc_hiz_tile_fifo_size; in amdgpu_debugfs_gca_config_read()
1064 adev->gfx.config.sc_hiz_tile_fifo_size = 0; in gfx_v11_0_gpu_early_init()1072 adev->gfx.config.sc_hiz_tile_fifo_size = 0; in gfx_v11_0_gpu_early_init()1083 adev->gfx.config.sc_hiz_tile_fifo_size = 0x80; in gfx_v11_0_gpu_early_init()
4525 adev->gfx.config.sc_hiz_tile_fifo_size = 0; in gfx_v10_0_gpu_early_init()4540 adev->gfx.config.sc_hiz_tile_fifo_size = 0; in gfx_v10_0_gpu_early_init()4551 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v10_0_gpu_early_init()
935 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v9_4_3_gpu_early_init()
882 adev->gfx.config.sc_hiz_tile_fifo_size = 0; in gfx_v12_0_gpu_early_init()