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Searched refs:vlv (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/i915/display/
H A Di9xx_wm.c1620 &crtc_state->wm.vlv.raw[level]; in vlv_raw_plane_wm_is_valid()
1622 &crtc_state->wm.vlv.fifo_state; in vlv_raw_plane_wm_is_valid()
1641 &crtc_state->wm.vlv.fifo_state; in _vlv_compute_pipe_wm()
1736 &crtc_state->wm.vlv.fifo_state; in vlv_compute_pipe_wm()
1763 &crtc_state->wm.vlv.fifo_state; in vlv_atomic_update_fifo()
1989 crtc->wm.active.vlv = crtc_state->wm.vlv.intermediate; in vlv_initial_watermarks()
2005 crtc->wm.active.vlv = crtc_state->wm.vlv.optimal; in vlv_optimize_watermarks()
3823 &crtc_state->wm.vlv.fifo_state; in vlv_wm_get_hw_state()
3835 &crtc_state->wm.vlv.raw[level]; in vlv_wm_get_hw_state()
3909 crtc_state->wm.vlv.optimal; in vlv_wm_sanitize()
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H A Dintel_display_power_map.c204 .vlv.idx = PUNIT_PWGT_IDX_DISP2D,
211 .vlv.idx = PUNIT_PWGT_IDX_DPIO_TX_B_LANES_01),
213 .vlv.idx = PUNIT_PWGT_IDX_DPIO_TX_B_LANES_23),
215 .vlv.idx = PUNIT_PWGT_IDX_DPIO_TX_C_LANES_01),
217 .vlv.idx = PUNIT_PWGT_IDX_DPIO_TX_C_LANES_23),
223 .vlv.idx = PUNIT_PWGT_IDX_DPIO_CMN_BC,
291 .vlv.idx = PUNIT_PWGT_IDX_DPIO_CMN_BC,
294 .vlv.idx = PUNIT_PWGT_IDX_DPIO_CMN_D,
H A Dintel_display_power_well.h73 } vlv; member
H A Dintel_display_core.h269 struct vlv_wm_values vlv; member
H A Dintel_display_types.h1000 } vlv; member
1501 struct vlv_wm_state vlv; member
H A Dintel_display_power_well.c1083 int pw_idx = i915_power_well_instance(power_well)->vlv.idx; in vlv_set_power_well()
1132 int pw_idx = i915_power_well_instance(power_well)->vlv.idx; in vlv_power_well_enabled()
/linux/drivers/gpu/drm/i915/
H A Dintel_clock_gating.c725 CG_FUNCS(vlv);