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/minix/external/bsd/llvm/dist/clang/INPUTS/
H A Dmacro_pounder_obj.c11 #define A5 A4 A4 A4 A4 A4 A4 macro
12 #define A6 A5 A5 A5 A5 A5 A5
H A Dmacro_pounder_fn.c11 #define A5(A, B) A4(A,B) A4(A,B) A4(A,B) A4(A,B) A4(A,B) A4(A,B) macro
12 #define A6(A, B) A5(A,B) A5(A,B) A5(A,B) A5(A,B) A5(A,B) A5(A,B)
/minix/external/bsd/llvm/dist/clang/test/Index/
H A Dannotate-comments-preprocessor.c19 #define A5 1 /// Aaa. macro
22 int A[] = { A0, A1, A2, A3, A4, A5, A6 };
25 int f(int a1[A1], int a2[A2], int a3[A3], int a4[A4], int a5[A5], int a6[A6]);
29 int g(int a1[A1], int a2[A2], int a3[A3], int a4[A4], int a5[A5], int a6[A6]);
/minix/external/bsd/llvm/dist/llvm/test/CodeGen/ARM/
H A Dbuild-attributes.ll423 ; CORTEX-A5-DEFAULT: .cpu cortex-a5
429 ; CORTEX-A5-NOT: .eabi_attribute 19
449 ; CORTEX-A5-NONEON: .cpu cortex-a5
454 ; CORTEX-A5-NONEON: .fpu vfpv4-d16
458 ; CORTEX-A5-NONEON-NOT: .eabi_attribute 22
473 ; CORTEX-A5-NOFPU: .cpu cortex-a5
478 ; CORTEX-A5-NOFPU-NOT: .fpu
479 ; CORTEX-A5-NOFPU-NOT: .eabi_attribute 19
483 ; CORTEX-A5-NOFPU-NOT: .eabi_attribute 22
494 ; CORTEX-A5-NOFPU-FAST: .eabi_attribute 20, 2
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H A D2010-05-20-NEONSpillCrash.ll12 define <8 x i8> @t3(i8* %A1, i8* %A2, i8* %A3, i8* %A4, i8* %A5, i8* %A6, i8* %A7, i8* %A8, i8* %B)…
19 …%tmp1e = call %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3.v8i8(i8* %A5, i32 1) ; <%struct.__neon…
H A Dreg_sequence.ll309 define <8 x i8> @t11(i8* %A1, i8* %A2, i8* %A3, i8* %A4, i8* %A5, i8* %A6, i8* %A7, i8* %A8, i8* %B…
/minix/external/bsd/llvm/dist/clang/test/SemaTemplate/
H A Dtemp_arg_nontype.cpp64 template<int (&fr)(int)> struct A5; // expected-note{{template parameter is declared here}}
65 A5<h> *a16_1;
66 A5<f> *a16_3;
67 A5<h2> *a16_6; // expected-error{{non-type template parameter of reference type 'int (&)(int)' can…
68 A5<g> *a14_7; // expected-error{{address of overloaded function 'g' does not match required type 'i…
/minix/external/bsd/llvm/dist/clang/test/CodeGen/
H A Dxcore-stringtype.c96 int A4[3][2], int A5[const volatile restrict static 2]) { in arrayType()
101 if (A5) EA2[0] = GA1[0]; in arrayType()
/minix/external/bsd/llvm/dist/llvm/include/llvm/IR/
H A DTypeBuilder.h306 typename A5, bool cross>
307 class TypeBuilder<R(A1, A2, A3, A4, A5), cross> {
315 TypeBuilder<A5, cross>::get(Context), in get()
381 typename A5, bool cross>
382 class TypeBuilder<R(A1, A2, A3, A4, A5, ...), cross> {
390 TypeBuilder<A5, cross>::get(Context), in get()
/minix/external/bsd/llvm/dist/clang/test/CXX/temp/temp.param/
H A Dp4.cpp11 template<int *Ptr> struct A5;
/minix/external/bsd/llvm/dist/llvm/test/CodeGen/X86/
H A D2008-09-18-inline-asm-2.ll18 ; CHECK: 5th=[[A5:%...]]
20 ; CHECK-NOT: [[A5]]
/minix/external/bsd/llvm/dist/clang/test/Parser/
H A Dcxx-casting.cpp88 ::D[:F> A5; // expected-error {{class template '::D' requires template arguments}} \
H A Ddeclarators.c144 A5=12 4, // expected-error{{expected '}' or ','}}
/minix/minix/drivers/storage/mmc/
H A Demmc.txt18 BeagleBone Black System Reference Manual, Revision A5.6.
/minix/crypto/external/bsd/heimdal/dist/lib/hx509/data/
H A Dpkinit.crt31 E8:3F:1A:8B:C2:8A:9C:F9:B4:4F:95:D9:55:29:0C:A5:0B:0E:13:C6
H A Dpkinit-proxy-chain.crt45 E8:3F:1A:8B:C2:8A:9C:F9:B4:4F:95:D9:55:29:0C:A5:0B:0E:13:C6
/minix/minix/drivers/video/tda19988/
H A DREADME.txt35 example code from NXP for a Hitex LPC4350 REV A5 which includes
/minix/external/bsd/llvm/dist/llvm/unittests/ADT/
H A DAPIntTest.cpp661 APInt A5(integerPartWidth*4, I5); in TEST() local
662 EXPECT_EQ(A5.nearestLogBase2(), A5.logBase2()); in TEST()
/minix/external/bsd/llvm/dist/llvm/include/llvm/ADT/
H A DFoldingSet.h758 template <typename A1, typename A2, typename A3, typename A4, typename A5>
760 const A4 &a4, const A5 &a5) in FoldingSetNodeWrapper()
/minix/external/bsd/llvm/dist/clang/test/Misc/
H A Ddiag-template-diffing.cpp1237 template <class T> using A5 = A<T::num, 1>;
1238 template <class T> using A5 = A<T::num>;
/minix/external/bsd/llvm/dist/llvm/test/Analysis/CostModel/X86/
H A Dcast.ll251 ; CHECK-AVX512: cost of 3 {{.*}} %A5 = fptrunc
252 %A5 = fptrunc <16 x double> undef to <16 x float>
/minix/external/bsd/llvm/dist/llvm/lib/Target/ARM/
H A DARM.td184 "Cortex-A5 ARM processors",
337 // FIXME: A5 has currently the same Schedule model as A8
/minix/external/bsd/file/dist/magic/magdir/
H A Delf175 >18 leshort 93 ARC Cores Tangent-A5,
/minix/external/bsd/llvm/dist/llvm/test/MC/Disassembler/ARM/
H A Dinvalid-armv7.txt246 # A5.2.11 MSR (immediate), and hints & B6.1.6 MSR (immediate)
/minix/crypto/external/bsd/openssl/dist/crypto/modes/
H A Dgcm128.c1759 # define A5 A4 macro
1783 # define A6 A5

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