| /minix/external/bsd/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86InstrSystem.td | 69 OpSize32;
220 OpSize32;
223 OpSize32;
238 OpSize32;
241 OpSize32;
300 OpSize32, Requires<[In64BitMode]>;
303 OpSize32, Requires<[In64BitMode]>;
311 OpSize32, Requires<[Not64BitMode]>;
318 OpSize32, Requires<[Not64BitMode]>;
334 OpSize32, Requires<[In64BitMode]>;
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| H A D | X86InstrControl.td | 25 "ret{l}", [(X86retflag 0)], IIC_RET>, OpSize32,
28 "ret{q}", [(X86retflag 0)], IIC_RET>, OpSize32,
35 [(X86retflag timm:$amt)], IIC_RET_IMM>, OpSize32,
39 [(X86retflag timm:$amt)], IIC_RET_IMM>, OpSize32,
45 "{l}ret{l|f}", [], IIC_RET>, OpSize32;
51 "{l}ret{l|f}\t$amt", [], IIC_RET>, OpSize32;
66 "jmp\t$dst", [], IIC_JMP_REL>, OpSize32;
79 [], IIC_Jcc>, TB, OpSize32;
129 OpSize32, Sched<[WriteJump]>;
202 IIC_CALL_MEM>, OpSize32,
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| H A D | X86InstrShiftRotate.td | 46 OpSize32;
83 OpSize32;
99 IIC_SR>, OpSize32;
117 IIC_SR>, OpSize32;
183 OpSize32;
199 IIC_SR>, OpSize32;
217 IIC_SR>, OpSize32;
551 IIC_SR>, OpSize32;
569 IIC_SR>, OpSize32;
748 TB, OpSize32;
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| H A D | X86InstrExtension.td | 20 "{cwtl|cwde}", [], IIC_CBW>, OpSize32; // EAX = signext(AX)
27 "{cltd|cdq}", [], IIC_CBW>, OpSize32; // EDX:EAX = signext(EAX)
54 OpSize32, Sched<[WriteALU]>;
58 OpSize32, Sched<[WriteALULd]>;
62 OpSize32, Sched<[WriteALU]>;
66 OpSize32, TB, Sched<[WriteALULd]>;
80 OpSize32, Sched<[WriteALU]>;
84 OpSize32, Sched<[WriteALULd]>;
88 OpSize32, Sched<[WriteALU]>;
92 TB, OpSize32, Sched<[WriteALULd]>;
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| H A D | X86InstrInfo.td | 1439 OpSize32, TB;
1511 OpSize32, TB;
1522 OpSize32, TB;
1555 OpSize32, TB;
1566 OpSize32, TB;
1599 OpSize32, TB;
1610 OpSize32, TB;
1692 OpSize32;
1724 OpSize32;
1737 OpSize32;
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| H A D | X86InstrArithmetic.td | 27 OpSize32, Requires<[Not64BitMode]>;
33 OpSize32, Requires<[In64BitMode]>;
166 TB, OpSize32;
190 TB, OpSize32;
230 IIC_IMUL32_RRI>, OpSize32;
324 SchedLoadReg<WriteIDivLd>, OpSize32;
445 OpSize32;
467 IIC_UNARY_REG>, OpSize32;
513 IIC_UNARY_REG>, OpSize32;
607 /// to Opsize16. i32 sets this to OpSize32.
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| H A D | X86InstrTSX.td | 30 "xbegin\t$dst", []>, OpSize32, Requires<[HasRTM]>;
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| H A D | X86InstrCMovSetCC.td | 31 IIC_CMOV32_RR>, TB, OpSize32;
53 TB, OpSize32;
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| H A D | X86InstrCompiler.td | 348 [(X86rep_movs i32)], IIC_REP_MOVS>, REP, OpSize32,
360 [(X86rep_movs i32)], IIC_REP_MOVS>, REP, OpSize32,
379 [(X86rep_stos i32)], IIC_REP_STOS>, REP, OpSize32,
394 [(X86rep_stos i32)], IIC_REP_STOS>, REP, OpSize32,
574 [], IIC_ALU_NONMEM>, OpSize32, LOCK;
601 [], IIC_ALU_MEM>, OpSize32, LOCK;
621 [], IIC_ALU_MEM>, OpSize32, LOCK;
653 [], IIC_UNARY_MEM>, OpSize32, LOCK;
689 [(frag addr:$ptr, GR32:$swap, 4)], itin>, TB, OpSize32, LOCK;
739 itin>, OpSize32;
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| H A D | X86InstrFormats.td | 147 def OpSize32 : OperandSize<2>; // Needs 0x66 prefix in 16-bit mode.
161 class OpSize32 { OperandSize OpSize = OpSize32; }
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| H A D | X86InstrSSE.td | 6925 OpSize32, XS;
6931 Sched<[WriteFAddLd]>, OpSize32, XS;
7746 int_x86_sse42_crc32_32_32>, OpSize32;
7748 int_x86_sse42_crc32_32_32>, OpSize32;
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| /minix/external/bsd/llvm/dist/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86BaseInfo.h | 333 OpSize32 = 2 << OpSizeShift, enumerator
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| H A D | X86MCCodeEmitter.cpp | 1110 if ((TSFlags & X86II::OpSizeMask) == (is16BitMode(STI) ? X86II::OpSize32 in EmitOpcodePrefix()
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| /minix/external/bsd/llvm/dist/llvm/utils/TableGen/ |
| H A D | X86RecognizableInstr.cpp | 120 OpSize16 = 1, OpSize32 = 2 enumerator
915 } else if(OpSize == X86Local::OpSize32) { in typeFromString()
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