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Searched refs:SR (Results 1 – 25 of 103) sorted by relevance

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/minix/external/bsd/llvm/dist/llvm/test/CodeGen/Mips/
H A Dhelloworld.ll7 …linux-gnu -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=SR
18 ; SR: .set mips16
22 ; SR-NOT: .set noreorder
23 ; SR-NOT: .set nomacro
24 ; SR-NOT: .set noat
28 ; SR: save $ra, 24 # 16 bit inst
39 ; SR: restore $ra, 24 # 16 bit inst
50 ; SR-NOT: .set at
51 ; SR-NOT: .set macro
52 ; SR-NOT: .set reorder
[all …]
/minix/external/bsd/llvm/dist/llvm/lib/Target/MSP430/
H A DMSP430InstrInfo.td114 // sub / add which can clobber SR.
133 let Defs = [SR] in {
195 let Uses = [SR] in
340 let Defs = [SR] in {
428 let Uses = [SR] in {
502 } // Uses = [SR]
866 let Uses = [SR] in {
937 } // Uses = [SR]
980 } // Defs = [SR]
996 let Defs = [SR] in {
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H A DMSP430RegisterInfo.td51 def SR : MSP430RegWithSubregs<2, "r2", [SRB]>;
81 PC, SP, SR, CG)>;
/minix/external/bsd/llvm/dist/llvm/lib/CodeGen/AsmPrinter/
H A DDwarfExpression.cpp107 for (MCSuperRegIterator SR(MachineReg, TRI); SR.isValid(); ++SR) { in AddMachineRegPiece() local
108 Reg = TRI->getDwarfRegNum(*SR, false); in AddMachineRegPiece()
110 unsigned Idx = TRI->getSubRegIndex(*SR, MachineReg); in AddMachineRegPiece()
140 for (MCSubRegIterator SR(MachineReg, TRI); SR.isValid(); ++SR) { in AddMachineRegPiece() local
141 unsigned Idx = TRI->getSubRegIndex(MachineReg, *SR); in AddMachineRegPiece()
144 Reg = TRI->getDwarfRegNum(*SR, false); in AddMachineRegPiece()
/minix/external/bsd/llvm/dist/llvm/test/CodeGen/XCore/
H A Depilogue_prologue.ll4 ; When using SP for small frames, we don't need any scratch registers (SR).
8 ; FP + small frame: spill FP+SR = entsp 2
29 ; FP + small frame: spill FP+SR+R0+LR = entsp 3 + extsp 1
62 ; FP + large frame: spill FP+SR = entsp 2 + 100000
83 ; !FP + large frame: spill SR+SR = entsp 2 + 100000
102 ; FP + large frame: spill FP+SR+R4+LR = entsp 3 + 200000 + extsp 1
155 ; !FP + large frame: spill SR+SR+R4+LR = entsp 4 + 200000
209 ; FP + large frame: spill FP+SR+LR = entsp 2 + 256 + extsp 1
223 ; !FP + large frame: spill SR+SR+LR = entsp 3 + 256
237 ; FP + large frame: spill FP+SR+LR = entsp 2 + 32768 + extsp 1
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H A Dscavenging.ll70 ; !FP + large frame: spill SR+SR = entsp 2 + 100000
76 ; scavenge r4 using SR spill slot
82 ; scavenge r5 using SR spill slot
/minix/external/bsd/llvm/dist/llvm/lib/CodeGen/
H A DMachineCopyPropagation.cpp79 for (MCSubRegIterator SR(MappedDef, TRI); SR.isValid(); ++SR) in SourceNoLongerAvailable() local
80 AvailCopyMap.erase(*SR); in SourceNoLongerAvailable()
222 for (MCSubRegIterator SR(Def, TRI, /*IncludeSelf=*/true); SR.isValid(); in CopyPropagateBlock() local
223 ++SR) { in CopyPropagateBlock()
224 CopyMap[*SR] = MI; in CopyPropagateBlock()
225 AvailCopyMap[*SR] = MI; in CopyPropagateBlock()
H A DLiveInterval.cpp691 if (SR.empty()) in constructMainRangeFromSubranges()
693 SRs.push_back(std::make_pair(&SR, SR.begin())); in constructMainRangeFromSubranges()
725 while (I != SR.end() && in constructMainRangeFromSubranges()
729 if (I == SR.end()) in constructMainRangeFromSubranges()
735 EventMask |= SR.LaneMask; in constructMainRangeFromSubranges()
740 EventMask = SR.LaneMask; in constructMainRangeFromSubranges()
752 EventMask = SR.LaneMask; in constructMainRangeFromSubranges()
875 OS << format(" L%04X ", SR.LaneMask) << SR; in print()
915 Mask |= SR.LaneMask; in verify()
920 SR.verify(); in verify()
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H A DDeadMachineInstructionElim.cpp150 for (MCSubRegIterator SR(Reg, TRI,/*IncludeSelf=*/true); in runOnMachineFunction() local
151 SR.isValid(); ++SR) in runOnMachineFunction()
152 LivePhysRegs.reset(*SR); in runOnMachineFunction()
H A DLiveIntervalAnalysis.cpp477 DEBUG(dbgs() << "Shrink: " << SR << '\n'); in shrinkToUses()
493 if ((SubRegMask & SR.LaneMask) == 0) in shrinkToUses()
502 LiveQueryResult LRQ = SR.Query(Idx); in shrinkToUses()
519 createSegmentsForValues(NewLR, make_range(SR.vni_begin(), SR.vni_end())); in shrinkToUses()
523 SR.segments.swap(NewLR.segments); in shrinkToUses()
526 for (auto VNI : SR.valnos) { in shrinkToUses()
536 SR.removeSegment(*Segment); in shrinkToUses()
617 pruneValue(SR, Kill, nullptr); in pruneValue()
654 SRs.push_back(std::make_pair(&SR, SR.find(LI.begin()->end))); in addKillFlags()
708 if (I == SR.end()) in addKillFlags()
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H A DVirtRegMap.cpp260 for (MCSubRegIndexIterator SR(PhysReg, TRI); SR.isValid(); ++SR) { in addMBBLiveIns() local
261 unsigned SubReg = SR.getSubReg(); in addMBBLiveIns()
262 unsigned SubRegIndex = SR.getSubRegIndex(); in addMBBLiveIns()
H A DRegisterScavenging.cpp224 for (MCSuperRegIterator SR(Reg, TRI); SR.isValid(); ++SR) { in forward() local
225 if (isRegUsed(*SR)) { in forward()
H A DLiveVariables.cpp435 for (MCSuperRegIterator SR(Reg, TRI); SR.isValid(); ++SR) in HandleRegMask() local
436 if ((PhysRegDef[*SR] || PhysRegUse[*SR]) && MO.clobbersPhysReg(*SR)) in HandleRegMask()
437 Super = *SR; in HandleRegMask()
/minix/external/bsd/llvm/dist/clang/tools/libclang/
H A DCXLoadedDiagnostic.cpp208 CXSourceRange &SR);
292 CXSourceRange &SR) { in readRange() argument
305 SR = clang_getRange(startLoc, endLoc); in readRange()
354 CXSourceRange SR; in visitSourceRangeRecord() local
355 if (std::error_code EC = readRange(Start, End, SR)) in visitSourceRangeRecord()
357 CurrentDiags.back()->Ranges.push_back(SR); in visitSourceRangeRecord()
365 CXSourceRange SR; in visitFixitRecord() local
366 if (std::error_code EC = readRange(Start, End, SR)) in visitFixitRecord()
372 std::make_pair(SR, TopDiags->copyString(CodeToInsert))); in visitFixitRecord()
/minix/external/bsd/llvm/dist/clang/lib/StaticAnalyzer/Checkers/
H A DTestAfterDivZeroChecker.cpp149 SymbolRef SR = Var.getAsSymbol(); in setDivZeroMap() local
150 if (!SR) in setDivZeroMap()
155 State->add<DivZeroMap>(ZeroState(SR, C.getBlockID(), C.getStackFrame())); in setDivZeroMap()
161 SymbolRef SR = Var.getAsSymbol(); in hasDivZeroMap() local
162 if (!SR) in hasDivZeroMap()
165 ZeroState ZS(SR, C.getBlockID(), C.getStackFrame()); in hasDivZeroMap()
H A DCastSizeChecker.cpp111 const SymbolicRegion *SR = dyn_cast<SymbolicRegion>(R); in checkPreStmt() local
112 if (!SR) in checkPreStmt()
116 SVal extent = SR->getExtent(svalBuilder); in checkPreStmt()
H A DUnreachableCodeChecker.cpp150 SourceRange SR; in checkEndAnalysis() local
154 SR = S->getSourceRange(); in checkEndAnalysis()
157 if (SR.isInvalid() || !SL.isValid()) in checkEndAnalysis()
169 "This statement is never executed", DL, SR); in checkEndAnalysis()
H A DCheckerDocumentation.cpp155 void checkDeadSymbols(SymbolReaper &SR, CheckerContext &C) const {} in checkDeadSymbols() argument
216 void checkLiveSymbols(ProgramStateRef State, SymbolReaper &SR) const {} in checkLiveSymbols()
/minix/external/bsd/llvm/dist/clang/include/clang/AST/
H A DRawCommentList.h43 RawComment(const SourceManager &SourceMgr, SourceRange SR,
147 RawComment(SourceRange SR, CommentKind K, bool IsTrailingComment, in RawComment() argument
150 Range(SR), RawTextValid(false), BriefTextValid(false), Kind(K), in RawComment()
/minix/external/bsd/llvm/dist/clang/lib/StaticAnalyzer/Core/
H A DSVals.cpp41 if (const SymbolicRegion *SR = dyn_cast<SymbolicRegion>(R)) { in hasConjuredSymbol() local
42 SymbolRef sym = SR->getSymbol(); in hasConjuredSymbol()
93 while (const SubRegion *SR = dyn_cast<SubRegion>(R)) { in getLocSymbolInBase() local
94 if (const SymbolicRegion *SymR = dyn_cast<SymbolicRegion>(SR)) in getLocSymbolInBase()
97 R = SR->getSuperRegion(); in getLocSymbolInBase()
H A DProgramState.cpp594 if (const SymbolicRegion *SR = dyn_cast<SymbolicRegion>(R)) in scan() local
595 if (!visitor.VisitSymbol(SR->getSymbol())) in scan()
599 if (const SubRegion *SR = dyn_cast<SubRegion>(R)) { in scan() local
600 const MemRegion *Super = SR->getSuperRegion(); in scan()
607 if (!StoreMgr.scanReachableSymbols(state->getStore(), SR, *this)) in scan()
670 if (const SymbolicRegion *SR = dyn_cast_or_null<SymbolicRegion>(R)) in addTaint() local
671 return addTaint(SR->getSymbol(), Kind); in addTaint()
713 if (const SymbolicRegion *SR = dyn_cast<SymbolicRegion>(Reg)) in isTainted() local
714 return isTainted(SR->getSymbol(), K); in isTainted()
773 if (const SymbolicRegion *SR = dyn_cast<SymbolicRegion>(Reg)) { in REGISTER_TRAIT_WITH_PROGRAMSTATE() local
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H A DRegionStore.cpp426 B = removeSubRegionBindings(B, SR); in BindDefault()
1038 IS.insert(SR->getSymbol()); in VisitCluster()
1284 T = SR->getSymbol()->getType(); in getBinding()
1385 RegionTy = SR->getSymbol()->getType(); in getUnderlyingType()
1657 while (SR) { in getBindingForFieldOrElementCommon()
1676 SR = dyn_cast<SubRegion>(Base); in getBindingForFieldOrElementCommon()
1918 R = GetElementZeroRegion(SR, T); in bind()
2213 AddToWorkList(SR, &C); in VisitAddedToCluster()
2215 Postponed.push_back(SR); in VisitAddedToCluster()
2292 if (const SymbolicRegion *SR = *I) { in UpdatePostponed() local
[all …]
H A DMemRegion.cpp1030 const SubRegion* SR = dyn_cast<SubRegion>(this); in getMemorySpace() local
1032 while (SR) { in getMemorySpace()
1033 R = SR->getSuperRegion(); in getMemorySpace()
1034 SR = dyn_cast<SubRegion>(R); in getMemorySpace()
1232 } else if (const SymbolicRegion *SR = dyn_cast<SymbolicRegion>(R)) { in getAsOffset() local
1236 Ty = SR->getSymbol()->getType()->getPointeeType(); in getAsOffset()
1463 if (const SymbolicRegion *SR = dyn_cast<SymbolicRegion>(MR)) in setTrait() local
1464 setTrait(SR->getSymbol(), IK); in setTrait()
1483 if (const SymbolicRegion *SR = dyn_cast<SymbolicRegion>(MR)) in hasTrait() local
1484 return hasTrait(SR->getSymbol(), IK); in hasTrait()
/minix/external/bsd/llvm/dist/clang/lib/AST/
H A DRawCommentList.cpp67 RawComment::RawComment(const SourceManager &SourceMgr, SourceRange SR, in RawComment() argument
69 Range(SR), RawTextValid(false), BriefTextValid(false), in RawComment()
73 if (SR.getBegin() == SR.getEnd() || getRawText(SourceMgr).empty()) { in RawComment()
/minix/external/bsd/llvm/dist/llvm/utils/TableGen/
H A DCodeGenRegisters.cpp216 CodeGenRegister *SR = I->second; in inheritRegUnits() local
218 mergeRegUnits(RegUnits, SR->RegUnits); in inheritRegUnits()
232 CodeGenRegister *SR = ExplicitSubRegs[i]; in computeSubRegs() local
248 CodeGenRegister *SR = ExplicitSubRegs[i]; in computeSubRegs() local
266 CodeGenRegister *SR = SubRegs[Idx]; in computeSubRegs() local
304 CodeGenRegister *SR = SubRegs[Idx]; in computeSubRegs() local
346 CodeGenRegister *SR = ExplicitSubRegs[i]; in computeSubRegs() local
347 if (!SR->CoveredBySubRegs || SR->ExplicitSubRegs.size() <= 1) in computeSubRegs()
370 RegUnits.append(SR->RegUnits.begin(), SR->RegUnits.end()); in computeSubRegs()
526 if (OSet.insert(SR)) in addSubRegsPreOrder()
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