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Searched refs:SSE3 (Results 1 – 17 of 17) sorted by relevance

/minix/external/bsd/llvm/dist/llvm/test/CodeGen/X86/
H A Dhaddsub.ll5 ; SSE3-NOT: vhaddpd
6 ; SSE3: haddpd
18 ; SSE3: haddpd
30 ; SSE3: haddpd
42 ; SSE3: haddps
54 ; SSE3: haddps
66 ; SSE3: haddps
78 ; SSE3: haddps
90 ; SSE3: haddps
102 ; SSE3: haddps
[all …]
H A Dvector-shuffle-128-v4.ll254 ; SSE3: # BB#0:
256 ; SSE3-NEXT: retq
282 ; SSE3: # BB#0:
284 ; SSE3-NEXT: retq
315 ; SSE3-NEXT: retq
453 ; SSE3-NEXT: retq
490 ; SSE3-NEXT: retq
527 ; SSE3-NEXT: retq
563 ; SSE3-NEXT: retq
600 ; SSE3-NEXT: retq
[all …]
H A Dvector-shuffle-128-v2.ll107 ; SSE3: # BB#0:
109 ; SSE3-NEXT: retq
162 ; SSE3: # BB#0:
165 ; SSE3-NEXT: retq
222 ; SSE3: # BB#0:
225 ; SSE3-NEXT: retq
254 ; SSE3-NEXT: retq
313 ; SSE3-NEXT: retq
349 ; SSE3-NEXT: retq
384 ; SSE3-NEXT: retq
[all …]
H A Dhaddsub-2.ll124 ; SSE3-NOT: phaddd
151 ; SSE3-NOT: phaddd
178 ; SSE3-NOT: phsubd
205 ; SSE3-NOT: phsubd
296 ; SSE3: haddpd
327 ; SSE3: hsubpd
374 ; SSE3-NOT: phaddd
566 ; SSE3: haddps
611 ; SSE3: hsubps
640 ; SSE3: haddpd
[all …]
H A Dsplat-for-size.ll7 …s no AVX broadcast from double to 128-bit vector because movddup has been around since SSE3 (grrr).
H A Dsse2.ll1 ; Tests for SSE2 and below, without SSE3+.
H A Dsse3.ll1 ; These are tests for SSE3 codegen.
/minix/external/bsd/llvm/dist/llvm/test/Analysis/CostModel/X86/
H A Darith.ll2 …st-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mcpu=core2 | FileCheck %s --check-prefix=SSE3
51 ; SSE3: sse3mull
53 ; SSE3: cost of 6 {{.*}} mul
56 ; SSE3: avx2mull
H A Dreduction.ll2 …eduxcost=true -analyze -mcpu=corei7 -mtriple=x86_64-apple-darwin | FileCheck %s --check-prefix=SSE3
104 ; SSE3: cost of 2 {{.*}} extractelement
118 ; SSE3: cost of 4 {{.*}} extractelement
158 ; SSE3: cost of 2 {{.*}} extractelement
172 ; SSE3: cost of 3 {{.*}} extractelement
201 ; SSE3: cost of 4 {{.*}} extractelement
229 ; SSE3: cost of 2 {{.*}} extractelement
245 ; SSE3: cost of 4 {{.*}} extractelement
291 ; SSE3: cost of 2 {{.*}} extractelement
307 ; SSE3: cost of 3 {{.*}} extractelement
[all …]
/minix/external/bsd/llvm/dist/llvm/lib/Target/X86/
H A DX86Subtarget.h50 NoMMXSSE, MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2, AVX512F enumerator
342 bool hasSSE3() const { return X86SSELevel >= SSE3; } in hasSSE3()
H A DX86.td51 def FeatureSSE3 : SubtargetFeature<"sse3", "X86SSELevel", "SSE3",
52 "Enable SSE3 instructions",
H A DX86InstrFormats.td588 // SSE3 Instruction Templates:
590 // S3I - SSE3 instructions with PD prefixes.
591 // S3SI - SSE3 instructions with XS prefix.
592 // S3DI - SSE3 instructions with XD prefix.
H A DX86InstrFPStack.td476 // FISTTP requires SSE3 even though it's a FPStack op.
H A DX86InstrSSE.td5325 // SSE3 - Replicate Single FP - MOVSHDUP and MOVSLDUP
5386 // SSE3 - Replicate Double FP - MOVDDUP
5465 // SSE3 - Move Unaligned Integer
5485 // SSE3 - Arithmetic
5563 // SSE3 Instructions
/minix/external/bsd/llvm/dist/clang/lib/Basic/
H A DTargets.cpp1755 NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2, AVX512F enumerator
2410 case SSE3: in setSSELevel()
2429 case SSE3: in setSSELevel()
2488 setSSELevel(Features, SSE3, true); in setXOPLevel()
2522 setSSELevel(Features, SSE3, Enabled); in setFeatureEnabledImpl()
2702 .Case("sse3", SSE3) in handleTargetFeatures()
3026 case SSE3: in getTargetDefines()
3046 case SSE3: in getTargetDefines()
3111 .Case("sse3", SSELevel >= SSE3) in hasFeature()
/minix/external/bsd/llvm/dist/clang/docs/
H A DCrossCompilation.rst113 * ``-fpu=<fpu-name>``, like SSE3, NEON, controlling the FP unit available
/minix/external/bsd/llvm/dist/llvm/include/llvm/IR/
H A DIntrinsicsX86.td559 // SSE3