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Searched refs:UMLAL (Results 1 – 13 of 13) sorted by relevance

/minix/external/bsd/llvm/dist/llvm/test/MC/ARM/
H A Dmul-v4.s1 @ PR17647: MUL/MLA/SMLAL/UMLAL should be avalaibe to IAS for ARMv4 and higher
H A Dbasic-thumb2-instructions.s3341 @ UMLAL
H A Dbasic-arm-instructions.s3282 @ UMLAL
/minix/external/bsd/llvm/dist/llvm/lib/Target/ARM/
H A DARMISelLowering.h170 UMLAL, // 64bit Unsigned Accumulate Multiply enumerator
H A DARMInstrInfo.td93 def ARMUmlal : SDNode<"ARMISD::UMLAL", SDT_ARM64bitmlal>;
3870 def UMLAL : AsMla1I64<0b0000101, (outs GPR:$RdLo, GPR:$RdHi),
3900 (UMLAL GPR:$RdLo, GPR:$RdHi, GPR:$Rn, GPR:$Rm, GPR:$RLo, GPR:$RHi,
5622 // MUL/UMLAL/SMLAL/UMULL/SMULL are available on all arches, but
5636 (UMLAL GPR:$RdLo, GPR:$RdHi, GPR:$Rn, GPR:$Rm, pred:$p, cc_out:$s)>,
H A DARMISelDAGToDAG.cpp2636 case ARMISD::UMLAL:{ in Select()
2648 ARM::UMLAL : ARM::UMLALv5, in Select()
H A DARMScheduleSwift.td1328 (instregex "SMLALS", "UMLALS", "SMLAL", "UMLAL", "MLALBB", "SMLALBT",
H A DARMScheduleA9.td2501 (instregex "SMULL", "SMULLv5", "UMULL", "UMULLv5", "SMLAL$", "UMLAL",
H A DARMISelLowering.cpp1111 case ARMISD::UMLAL: return "ARMISD::UMLAL"; in getTargetNodeName()
8072 unsigned FinalOpc = (Opc == ISD::SMUL_LOHI) ? ARMISD::SMLAL : ARMISD::UMLAL; in AddCombineTo64bitMLAL()
/minix/external/bsd/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64SchedCyclone.td522 (instregex "MLA","MLS","SMLAL","SMLSL","UMLAL","UMLSL",
H A DAArch64InstrInfo.td3232 defm UMLAL : SIMDLongThreeVectorTiedBHS<1, 0b1000, "umlal",
3258 // Additional patterns for SMLAL/SMLSL and UMLAL/UMLSL
4328 defm UMLAL : SIMDVectorIndexedLongSDTied<1, 0b0010, "umlal",
/minix/external/bsd/llvm/dist/llvm/test/MC/Disassembler/ARM/
H A Dbasic-arm-instructions.txt2288 # UMLAL
H A Dthumb2.txt2428 # UMLAL