Home
last modified time | relevance | path

Searched refs:ZEROReg (Results 1 – 2 of 2) sorted by relevance

/minix/external/bsd/llvm/dist/llvm/lib/Target/Mips/
H A DMipsSEInstrInfo.cpp389 unsigned ZEROReg = STI.isABI_N64() ? Mips::ZERO_64 : Mips::ZERO; in loadImmediate() local
408 BuildMI(MBB, II, DL, get(Inst->Opc), Reg).addReg(ZEROReg) in loadImmediate()
H A DMipsInstrInfo.td1766 Instruction SLTiuOp, Register ZEROReg> {
1768 (BNEOp RC:$lhs, ZEROReg, bb:$dst)>;
1770 (BEQOp RC:$lhs, ZEROReg, bb:$dst)>;
1791 (BNEOp RC:$cond, ZEROReg, bb:$dst)>;
1803 Instruction SLTuOp, Register ZEROReg> {
1807 (SLTuOp ZEROReg, RC:$lhs)>;
1811 (SLTuOp ZEROReg, (XOROp RC:$lhs, RC:$rhs))>;