/minix/external/bsd/llvm/dist/llvm/lib/Target/X86/ |
H A D | X86Schedule.td | 17 def ReadAfterLd : SchedRead; 21 def WriteRMW : SchedWrite; 35 def Ld : SchedWrite; 53 def WriteLoad : SchedWrite; 54 def WriteStore : SchedWrite; 55 def WriteMove : SchedWrite; 59 def WriteZero : SchedWrite; 117 def WriteSystem : SchedWrite; 128 def WriteFence : SchedWrite; 131 def WriteNop : SchedWrite; [all …]
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H A D | X86RegisterInfo.td | 48 def AL : X86Reg<"al", 0>; 49 def DL : X86Reg<"dl", 2>; 50 def CL : X86Reg<"cl", 1>; 51 def BL : X86Reg<"bl", 3>; 55 def AH : X86Reg<"ah", 4>; 56 def DH : X86Reg<"dh", 6>; 57 def CH : X86Reg<"ch", 5>; 58 def BH : X86Reg<"bh", 7>; 89 def IP : X86Reg<"ip", 0>; 258 def CS : X86Reg<"cs", 1>; [all …]
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/minix/external/bsd/llvm/dist/llvm/lib/Target/ARM/ |
H A D | ARMSchedule.td | 58 def WriteALU : SchedWrite; 59 def ReadALU : SchedRead; 68 def WriteCMP : SchedWrite; 69 def WriteCMPsi : SchedWrite; 70 def WriteCMPsr : SchedWrite; 73 def WriteDiv : SchedWrite; 76 def WriteLd : SchedWrite; 80 def WriteBr : SchedWrite; 81 def WriteBrL : SchedWrite; 88 def WriteNoop : SchedWrite; [all …]
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/minix/external/bsd/llvm/dist/clang/include/clang/Basic/ |
H A D | StmtNodes.td | 12 def NullStmt : Stmt; 14 def LabelStmt : Stmt; 16 def IfStmt : Stmt; 17 def SwitchStmt : Stmt; 18 def WhileStmt : Stmt; 19 def DoStmt : Stmt; 20 def ForStmt : Stmt; 21 def GotoStmt : Stmt; 24 def BreakStmt : Stmt; 26 def DeclStmt : Stmt; [all …]
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H A D | DeclNodes.td | 14 def Named : Decl<1>; 18 def Label : DDecl<Named>; 19 def Type : DDecl<Named, 1>; 25 def Enum : DDecl<Tag>; 74 def FileScopeAsm : Decl; 75 def AccessSpec : Decl; 76 def Friend : Decl; 77 def FriendTemplate : Decl; 78 def StaticAssert : Decl; 82 def Import : Decl; [all …]
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H A D | DiagnosticGroups.td | 20 def : DiagGroup<"abi">; 35 def ConstantConversion : 64 def : DiagGroup<"char-align">; 179 def : DiagGroup<"effc++">; 196 def : DiagGroup<"import">; 200 def IncompatiblePointerTypes 215 def : DiagGroup<"inline">; 264 def FunctionDefInObjCContainer : DiagGroup<"function-def-in-objc-container">; 306 def : DiagGroup<"synth">; 455 def VLA : DiagGroup<"vla">; [all …]
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/minix/external/bsd/llvm/dist/clang/include/clang/AST/ |
H A D | CommentHTMLNamedCharacterReferences.td | 15 def : NCR<"copy", 0x000A9>; 16 def : NCR<"COPY", 0x000A9>; 17 def : NCR<"trade", 0x02122>; 18 def : NCR<"TRADE", 0x02122>; 19 def : NCR<"reg", 0x000AE>; 20 def : NCR<"REG", 0x000AE>; 21 def : NCR<"lt", 0x0003C>; 22 def : NCR<"Lt", 0x0003C>; 23 def : NCR<"LT", 0x0003C>; 24 def : NCR<"gt", 0x0003E>; [all …]
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H A D | CommentCommands.td | 51 def Begin : Command<name> { 56 def End : Command<endCommandName> { 84 def B : InlineCommand<"b">; 85 def C : InlineCommand<"c">; 86 def P : InlineCommand<"p">; 87 def A : InlineCommand<"a">; 88 def E : InlineCommand<"e">; 89 def Em : InlineCommand<"em">; 135 def Li : BlockCommand<"li">; 142 def Sa : BlockCommand<"sa">; [all …]
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H A D | CommentHTMLTags.td | 7 def Em : Tag<"em">; 9 def Tt : Tag<"tt">; 10 def I : Tag<"i">; 11 def B : Tag<"b">; 12 def Big : Tag<"big">; 15 def S : Tag<"s">; 16 def U : Tag<"u">; 18 def A : Tag<"a">; 22 def H1 : Tag<"h1">; 23 def H2 : Tag<"h2">; [all …]
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/minix/external/bsd/llvm/dist/llvm/test/TableGen/ |
H A D | NestedForeach.td | 20 // CHECK: def C2D0 21 // CHECK: def C2D2 22 // CHECK: def C2D4 23 // CHECK: def C2P0 24 // CHECK: def C2P2 25 // CHECK: def C2P4 26 // CHECK: def C2Q0 27 // CHECK: def C2Q2 28 // CHECK: def C2Q4 29 // CHECK: def C3D0 [all …]
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/minix/external/bsd/llvm/dist/llvm/lib/Target/Mips/ |
H A D | MipsSchedule.td | 13 def ALU : FuncUnit; 14 def IMULDIV : FuncUnit; 19 def IIAlu : InstrItinClass; 20 def IIBranch : InstrItinClass; 21 def IIPseudo : InstrItinClass; 23 def II_ABS : InstrItinClass; 24 def II_ADDI : InstrItinClass; 25 def II_ADDIU : InstrItinClass; 26 def II_ADDU : InstrItinClass; 27 def II_ADD_D : InstrItinClass; [all …]
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H A D | MipsRegisterInfo.td | 14 def sub_32 : SubRegIndex<32>; 15 def sub_64 : SubRegIndex<64>; 16 def sub_lo : SubRegIndex<32>; 213 def PC : Register<"pc">; 232 def DSPPos : Register<"">; 234 def DSPCarry : Register<"">; 235 def DSPEFI : Register<"">; 241 def DSPCCond : Register<"">; 263 def P0 : MipsReg<0, "p0">; 264 def P1 : MipsReg<1, "p1">; [all …]
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/minix/external/bsd/llvm/dist/llvm/lib/Target/R600/ |
H A D | SIIntrinsics.td | 137 def int_SI_gather4 : SampleRaw; 139 def int_SI_gather4_l : SampleRaw; 140 def int_SI_gather4_b : SampleRaw; 145 def int_SI_gather4_c : SampleRaw; 168 def int_SI_getlod : SampleRaw; 171 def int_SI_image_load : Image; 173 def int_SI_getresinfo : Image; 178 def int_SI_sample : Sample; 179 def int_SI_sampleb : Sample; 180 def int_SI_sampled : Sample; [all …]
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/minix/external/bsd/llvm/dist/llvm/lib/Target/AArch64/ |
H A D | AArch64RegisterInfo.td | 23 def sub_32 : SubRegIndex<32>; 25 def bsub : SubRegIndex<8>; 26 def hsub : SubRegIndex<16>; 27 def ssub : SubRegIndex<32>; 28 def dsub : SubRegIndex<32>; 30 def qsub : SubRegIndex<64>; 32 def dsub0 : SubRegIndex<64>; 33 def dsub1 : SubRegIndex<64>; 34 def dsub2 : SubRegIndex<64>; 35 def dsub3 : SubRegIndex<64>; [all …]
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H A D | AArch64SchedA57.td | 24 def CortexA57Model : SchedMachineModel { 101 def : ReadAdvance<ReadI, 0>; 102 def : ReadAdvance<ReadISReg, 0>; 103 def : ReadAdvance<ReadIEReg, 0>; 104 def : ReadAdvance<ReadIM, 0>; 106 def : ReadAdvance<ReadID, 0>; 107 def : ReadAdvance<ReadExtrHi, 0>; 108 def : ReadAdvance<ReadAdrBase, 0>; 109 def : ReadAdvance<ReadVLD, 0>; 120 def : InstRW<[WriteI], (instrs COPY)>; [all …]
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/minix/external/bsd/llvm/dist/llvm/include/llvm/IR/ |
H A D | IntrinsicsMips.td | 16 def mips_v2q15_ty: LLVMType<v2i16>; 17 def mips_v4q7_ty: LLVMType<v4i8>; 18 def mips_q31_ty: LLVMType<i32>; 50 def int_mips_madd: GCCBuiltin<"__builtin_mips_madd">, 53 def int_mips_maddu: GCCBuiltin<"__builtin_mips_maddu">, 57 def int_mips_msub: GCCBuiltin<"__builtin_mips_msub">, 60 def int_mips_msubu: GCCBuiltin<"__builtin_mips_msubu">, 69 def int_mips_addsc: GCCBuiltin<"__builtin_mips_addsc">, 71 def int_mips_addwc: GCCBuiltin<"__builtin_mips_addwc">, 268 def int_mips_lhx: GCCBuiltin<"__builtin_mips_lhx">, [all …]
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H A D | IntrinsicsAArch64.td | 23 def int_aarch64_stxp : Intrinsic<[llvm_i32_ty], 25 def int_aarch64_stlxp : Intrinsic<[llvm_i32_ty], 28 def int_aarch64_clrex : Intrinsic<[]>; 38 def int_aarch64_hint : Intrinsic<[], [llvm_i32_ty]>; 207 def int_aarch64_neon_pmull64 : 217 def int_aarch64_neon_sqdmulls_scalar 386 def int_aarch64_neon_vcvtfp2hf 388 def int_aarch64_neon_vcvthf2fp 570 def int_aarch64_neon_tbl1 : AdvSIMD_Tbl1_Intrinsic; 571 def int_aarch64_neon_tbl2 : AdvSIMD_Tbl2_Intrinsic; [all …]
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H A D | IntrinsicsHexagon.td | 771 def int_hexagon_C2_and : 776 def int_hexagon_C2_or : 781 def int_hexagon_C2_xor : 786 def int_hexagon_C2_andn : 791 def int_hexagon_C2_not : 796 def int_hexagon_C2_orn : 846 def int_hexagon_C2_any8 : 851 def int_hexagon_C2_all8 : 861 def int_hexagon_C2_mux : 881 def int_hexagon_C2_vmux : [all …]
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H A D | IntrinsicsXCore.td | 18 def int_xcore_crc8 : Intrinsic<[llvm_i32_ty, llvm_i32_ty], 21 def int_xcore_crc32 : Intrinsic<[llvm_i32_ty], 34 def int_xcore_geted : Intrinsic<[llvm_i32_ty],[]>; 35 def int_xcore_getet : Intrinsic<[llvm_i32_ty],[]>; 36 def int_xcore_setsr : Intrinsic<[],[llvm_i32_ty]>; 37 def int_xcore_clrsr : Intrinsic<[],[llvm_i32_ty]>; 41 def int_xcore_freer : Intrinsic<[],[llvm_anyptr_ty], 70 def int_xcore_clrpt : Intrinsic<[],[llvm_anyptr_ty], 74 def int_xcore_syncr : Intrinsic<[],[llvm_anyptr_ty], 103 def int_xcore_clre : Intrinsic<[],[],[]>; [all …]
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H A D | IntrinsicsPowerPC.td | 159 def int_ppc_altivec_lvx : 161 def int_ppc_altivec_lvxl : 163 def int_ppc_altivec_lvebx : 165 def int_ppc_altivec_lvehx : 167 def int_ppc_altivec_lvewx : 172 def int_ppc_altivec_stvx : 175 def int_ppc_altivec_stvxl : 520 def int_ppc_vsx_lxvw4x : 522 def int_ppc_vsx_lxvd2x : 526 def int_ppc_vsx_stxvw4x : [all …]
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H A D | IntrinsicsX86.td | 108 def int_x86_3dnowa_pswapd : 249 def int_x86_sse_stmxcsr : 251 def int_x86_sse_ldmxcsr : 2398 def int_x86_xop_vpcmov : 2539 def int_x86_xop_vpperm : 2570 def int_x86_xop_vpshab : 2574 def int_x86_xop_vpshad : 2578 def int_x86_xop_vpshaq : 2582 def int_x86_xop_vpshaw : 2586 def int_x86_xop_vpshlb : [all …]
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/minix/external/bsd/llvm/dist/llvm/lib/Target/Sparc/ |
H A D | SparcRegisterInfo.td | 25 def sub_even : SubRegIndex<32>; 27 def sub_even64 : SubRegIndex<64>; 148 def D16 : SparcReg< 1, "F32">; 149 def D17 : SparcReg< 3, "F34">; 150 def D18 : SparcReg< 5, "F36">; 151 def D19 : SparcReg< 7, "F38">; 152 def D20 : SparcReg< 9, "F40">; 153 def D21 : SparcReg<11, "F42">; 154 def D22 : SparcReg<13, "F44">; 155 def D23 : SparcReg<15, "F46">; [all …]
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H A D | SparcInstrVIS.td | 59 def FPADD16 : VISInst<0b001010000, "fpadd16">; 61 def FPADD32 : VISInst<0b001010010, "fpadd32">; 86 def FZERO : VISInstD<0b001100000, "fzero">; 88 def FONE : VISInstD<0b001111110, "fone">; 98 def FOR : VISInst<0b001111100, "for">; 100 def FNOR : VISInst<0b001100010, "fnor">; 102 def FAND : VISInst<0b001110000, "fand">; 106 def FXOR : VISInst<0b001101100, "fxor">; 154 def SIAM : VISInst0<0b010000001, "siam">; 205 def FMEAN16 : VISInst<0b001000000, "fmean16">; [all …]
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/minix/external/bsd/llvm/dist/clang/include/clang/Driver/ |
H A D | CLCompatOptions.td | 160 def _SLASH_EP : CLFlag<"EP">, 162 def _SLASH_FA : CLFlag<"FA">, 241 def _SLASH_FC : CLFlag<"FC">; 242 def _SLASH_F : CLFlag<"F">; 250 def _SLASH_Fx : CLFlag<"Fx">; 251 def _SLASH_G1 : CLFlag<"G1">; 252 def _SLASH_G2 : CLFlag<"G2">; 269 def _SLASH_H : CLFlag<"H">; 281 def _SLASH_u : CLFlag<"u">; 282 def _SLASH_V : CLFlag<"V">; [all …]
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H A D | Options.td | 22 def DriverOption : OptionFlag; 25 def LinkerInput : OptionFlag; 34 def Unsupported : OptionFlag; 38 def CoreOption : OptionFlag; 42 def CLOption : OptionFlag; 45 def CC1Option : OptionFlag; 48 def CC1AsOption : OptionFlag; 128 def internal_debug_Group : 265 def Qn : Flag<["-"], "Qn">; 268 def Q : Flag<["-"], "Q">; [all …]
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