Searched refs:is128BitVector (Results 1 – 11 of 11) sorted by relevance
| /minix/external/bsd/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | ValueTypes.h | 136 bool is128BitVector() const { in is128BitVector() function
137 return isSimple() ? V.is128BitVector() : isExtended128BitVector(); in is128BitVector()
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| H A D | MachineValueType.h | 220 bool is128BitVector() const { in is128BitVector() function
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| /minix/external/bsd/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64CallingConvention.h | 100 else if (LocVT.SimpleTy == MVT::f128 || LocVT.is128BitVector()) in CC_AArch64_Custom_Block()
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| H A D | AArch64ISelLowering.cpp | 1710 assert(ExtTy.is128BitVector() && "Unexpected extension size"); in addRequiredExtensionForVectorMULL()
1813 assert(VT.is128BitVector() && VT.isInteger() && in LowerMUL()
2092 else if (RegVT == MVT::f128 || RegVT.is128BitVector()) in LowerFormalArguments()
6118 (VT.is128BitVector() || VT.is64BitVector())) { in isShuffleMaskLegal()
7477 if (!VT.is128BitVector()) { in performAddSubLongCombine()
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| H A D | AArch64FastISel.cpp | 2859 VT.is128BitVector()) in fastLowerArguments()
2905 } else if (VT.is128BitVector()) { in fastLowerArguments()
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| H A D | AArch64ISelDAGToDAG.cpp | 1020 } else if (VT.is128BitVector()) { in SelectIndexedLoad()
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| /minix/external/bsd/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 4191 if (!VT.is128BitVector()) in isMOVHLPSMask()
4210 if (!VT.is128BitVector()) in isMOVHLPS_v_undef_Mask()
4227 if (!VT.is128BitVector()) in isMOVLPMask()
4249 if (!VT.is128BitVector()) in isMOVLHPSMask()
4528 if (!VT.is128BitVector()) in isMOVLMask()
4681 if (!VT.is128BitVector()) in isCommutedMOVLMask()
4772 if (!VT.is128BitVector()) in isMOVDDUPMask()
5036 if (!VT.is128BitVector()) in ShouldXformToMOVHLPS()
5093 if (!VT.is128BitVector()) in ShouldXformToMOVLP()
5287 if (VT.is128BitVector()) { in getLegalSplat()
[all …]
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| /minix/external/bsd/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelLowering.cpp | 671 if (!Ty.is128BitVector()) in performORCombine()
985 if (Ty.is128BitVector() && Ty.isInteger()) { in performVSELECTCombine()
1042 if (Subtarget.hasMSA() && Ty.is128BitVector() && Ty.isInteger()) { in performXORCombine()
2278 if (!VecTy.is128BitVector()) in lowerEXTRACT_VECTOR_ELT()
2330 if (!Subtarget.hasMSA() || !ResTy.is128BitVector()) in lowerBUILD_VECTOR()
2701 if (!ResTy.is128BitVector()) in lowerVECTOR_SHUFFLE()
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| H A D | MipsSEISelDAGToDAG.cpp | 838 if (!Subtarget->hasMSA() || !BVN->getValueType(0).is128BitVector()) in selectNode()
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| /minix/external/bsd/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 4200 EVT VmovVT = VT.is128BitVector() ? MVT::v4i32 : MVT::v2i32; in getZeroVector()
5125 DAG, VmovVT, VT.is128BitVector(), in LowerBUILD_VECTOR()
5136 DAG, VmovVT, VT.is128BitVector(), in LowerBUILD_VECTOR()
5469 (VT.is128BitVector() || VT.is64BitVector())) { in isShuffleMaskLegal()
5801 assert(Op.getValueType().is128BitVector() && Op.getNumOperands() == 2 && in LowerCONCAT_VECTORS()
5919 assert(ExtTy.is128BitVector() && "Unexpected extension size"); in AddRequiredExtensionForVMULL()
6023 assert(VT.is128BitVector() && VT.isInteger() && in LowerMUL()
8248 if (VT.is64BitVector() || VT.is128BitVector()) in PerformMULCombine()
8342 DAG, VbicVT, VT.is128BitVector(), in PerformANDCombine()
8385 DAG, VorrVT, VT.is128BitVector(), in PerformORCombine()
[all …]
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| H A D | ARMISelDAGToDAG.cpp | 2415 if (!VT.is128BitVector() || N->getNumOperands() != 2) in SelectConcatVector()
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