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Searched refs:ALU1 (Results 1 – 25 of 34) sorted by relevance

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/netbsd/external/gpl3/gdb/dist/opcodes/
H A Dnds32-dis.c545 case ALU1 (NOR): in nds32_filter_unknown_insn()
546 case ALU1 (SLT): in nds32_filter_unknown_insn()
552 case ALU1 (SLL): in nds32_filter_unknown_insn()
553 case ALU1 (SRL): in nds32_filter_unknown_insn()
554 case ALU1 (SRA): in nds32_filter_unknown_insn()
556 case ALU1 (SEB): in nds32_filter_unknown_insn()
557 case ALU1 (SEH): in nds32_filter_unknown_insn()
558 case ALU1 (ZEH): in nds32_filter_unknown_insn()
560 case ALU1 (SVA): in nds32_filter_unknown_insn()
561 case ALU1 (SVS): in nds32_filter_unknown_insn()
[all …]
H A Dnds32-asm.c331 {"add", "=rt,%ra,%rb", ALU1 (ADD), 4, ATTR_ALL, 0, NULL, 0, NULL},
332 {"sub", "=rt,%ra,%rb", ALU1 (SUB), 4, ATTR_ALL, 0, NULL, 0, NULL},
333 {"and", "=rt,%ra,%rb", ALU1 (AND), 4, ATTR_ALL, 0, NULL, 0, NULL},
334 {"xor", "=rt,%ra,%rb", ALU1 (XOR), 4, ATTR_ALL, 0, NULL, 0, NULL},
335 {"or", "=rt,%ra,%rb", ALU1 (OR), 4, ATTR_ALL, 0, NULL, 0, NULL},
336 {"nor", "=rt,%ra,%rb", ALU1 (NOR), 4, ATTR_ALL, 0, NULL, 0, NULL},
347 {"seb", "=rt,%ra", ALU1 (SEB), 4, ATTR_ALL, 0, NULL, 0, NULL},
348 {"seh", "=rt,%ra", ALU1 (SEH), 4, ATTR_ALL, 0, NULL, 0, NULL},
350 {"zeh", "=rt,%ra", ALU1 (ZEH), 4, ATTR_ALL, 0, NULL, 0, NULL},
351 {"wsbh", "=rt,%ra", ALU1 (WSBH), 4, ATTR_ALL, 0, NULL, 0, NULL},
[all …]
H A Dnds32-asm.h282 #define ALU1(sub) (OP6 (ALU1) | N32_ALU1_ ## sub) macro
/netbsd/external/gpl3/binutils.old/dist/opcodes/
H A Dnds32-dis.c545 case ALU1 (NOR): in nds32_filter_unknown_insn()
546 case ALU1 (SLT): in nds32_filter_unknown_insn()
552 case ALU1 (SLL): in nds32_filter_unknown_insn()
553 case ALU1 (SRL): in nds32_filter_unknown_insn()
554 case ALU1 (SRA): in nds32_filter_unknown_insn()
556 case ALU1 (SEB): in nds32_filter_unknown_insn()
557 case ALU1 (SEH): in nds32_filter_unknown_insn()
558 case ALU1 (ZEH): in nds32_filter_unknown_insn()
560 case ALU1 (SVA): in nds32_filter_unknown_insn()
561 case ALU1 (SVS): in nds32_filter_unknown_insn()
[all …]
H A Dnds32-asm.c331 {"add", "=rt,%ra,%rb", ALU1 (ADD), 4, ATTR_ALL, 0, NULL, 0, NULL},
332 {"sub", "=rt,%ra,%rb", ALU1 (SUB), 4, ATTR_ALL, 0, NULL, 0, NULL},
333 {"and", "=rt,%ra,%rb", ALU1 (AND), 4, ATTR_ALL, 0, NULL, 0, NULL},
334 {"xor", "=rt,%ra,%rb", ALU1 (XOR), 4, ATTR_ALL, 0, NULL, 0, NULL},
335 {"or", "=rt,%ra,%rb", ALU1 (OR), 4, ATTR_ALL, 0, NULL, 0, NULL},
336 {"nor", "=rt,%ra,%rb", ALU1 (NOR), 4, ATTR_ALL, 0, NULL, 0, NULL},
347 {"seb", "=rt,%ra", ALU1 (SEB), 4, ATTR_ALL, 0, NULL, 0, NULL},
348 {"seh", "=rt,%ra", ALU1 (SEH), 4, ATTR_ALL, 0, NULL, 0, NULL},
350 {"zeh", "=rt,%ra", ALU1 (ZEH), 4, ATTR_ALL, 0, NULL, 0, NULL},
351 {"wsbh", "=rt,%ra", ALU1 (WSBH), 4, ATTR_ALL, 0, NULL, 0, NULL},
[all …]
H A Dnds32-asm.h282 #define ALU1(sub) (OP6 (ALU1) | N32_ALU1_ ## sub) macro
/netbsd/external/gpl3/binutils/dist/opcodes/
H A Dnds32-dis.c537 case ALU1 (NOR): in nds32_filter_unknown_insn()
538 case ALU1 (SLT): in nds32_filter_unknown_insn()
544 case ALU1 (SLL): in nds32_filter_unknown_insn()
545 case ALU1 (SRL): in nds32_filter_unknown_insn()
546 case ALU1 (SRA): in nds32_filter_unknown_insn()
548 case ALU1 (SEB): in nds32_filter_unknown_insn()
549 case ALU1 (SEH): in nds32_filter_unknown_insn()
550 case ALU1 (ZEH): in nds32_filter_unknown_insn()
552 case ALU1 (SVA): in nds32_filter_unknown_insn()
553 case ALU1 (SVS): in nds32_filter_unknown_insn()
[all …]
H A Dnds32-asm.c331 {"add", "=rt,%ra,%rb", ALU1 (ADD), 4, ATTR_ALL, 0, NULL, 0, NULL},
332 {"sub", "=rt,%ra,%rb", ALU1 (SUB), 4, ATTR_ALL, 0, NULL, 0, NULL},
333 {"and", "=rt,%ra,%rb", ALU1 (AND), 4, ATTR_ALL, 0, NULL, 0, NULL},
334 {"xor", "=rt,%ra,%rb", ALU1 (XOR), 4, ATTR_ALL, 0, NULL, 0, NULL},
335 {"or", "=rt,%ra,%rb", ALU1 (OR), 4, ATTR_ALL, 0, NULL, 0, NULL},
336 {"nor", "=rt,%ra,%rb", ALU1 (NOR), 4, ATTR_ALL, 0, NULL, 0, NULL},
347 {"seb", "=rt,%ra", ALU1 (SEB), 4, ATTR_ALL, 0, NULL, 0, NULL},
348 {"seh", "=rt,%ra", ALU1 (SEH), 4, ATTR_ALL, 0, NULL, 0, NULL},
350 {"zeh", "=rt,%ra", ALU1 (ZEH), 4, ATTR_ALL, 0, NULL, 0, NULL},
351 {"wsbh", "=rt,%ra", ALU1 (WSBH), 4, ATTR_ALL, 0, NULL, 0, NULL},
[all …]
H A Dnds32-asm.h290 #define ALU1(sub) (OP6 (ALU1) | N32_ALU1_ ## sub) macro
/netbsd/external/gpl3/gdb.old/dist/opcodes/
H A Dnds32-dis.c545 case ALU1 (NOR): in nds32_filter_unknown_insn()
546 case ALU1 (SLT): in nds32_filter_unknown_insn()
552 case ALU1 (SLL): in nds32_filter_unknown_insn()
553 case ALU1 (SRL): in nds32_filter_unknown_insn()
554 case ALU1 (SRA): in nds32_filter_unknown_insn()
556 case ALU1 (SEB): in nds32_filter_unknown_insn()
557 case ALU1 (SEH): in nds32_filter_unknown_insn()
558 case ALU1 (ZEH): in nds32_filter_unknown_insn()
560 case ALU1 (SVA): in nds32_filter_unknown_insn()
561 case ALU1 (SVS): in nds32_filter_unknown_insn()
[all …]
H A Dnds32-asm.c331 {"add", "=rt,%ra,%rb", ALU1 (ADD), 4, ATTR_ALL, 0, NULL, 0, NULL},
332 {"sub", "=rt,%ra,%rb", ALU1 (SUB), 4, ATTR_ALL, 0, NULL, 0, NULL},
333 {"and", "=rt,%ra,%rb", ALU1 (AND), 4, ATTR_ALL, 0, NULL, 0, NULL},
334 {"xor", "=rt,%ra,%rb", ALU1 (XOR), 4, ATTR_ALL, 0, NULL, 0, NULL},
335 {"or", "=rt,%ra,%rb", ALU1 (OR), 4, ATTR_ALL, 0, NULL, 0, NULL},
336 {"nor", "=rt,%ra,%rb", ALU1 (NOR), 4, ATTR_ALL, 0, NULL, 0, NULL},
347 {"seb", "=rt,%ra", ALU1 (SEB), 4, ATTR_ALL, 0, NULL, 0, NULL},
348 {"seh", "=rt,%ra", ALU1 (SEH), 4, ATTR_ALL, 0, NULL, 0, NULL},
350 {"zeh", "=rt,%ra", ALU1 (ZEH), 4, ATTR_ALL, 0, NULL, 0, NULL},
351 {"wsbh", "=rt,%ra", ALU1 (WSBH), 4, ATTR_ALL, 0, NULL, 0, NULL},
[all …]
H A Dnds32-asm.h282 #define ALU1(sub) (OP6 (ALU1) | N32_ALU1_ ## sub) macro
/netbsd/external/gpl3/gcc.old/dist/gcc/config/mips/
H A Dloongson2ef.md30 ;; ALU1 and ALU2.
34 ;; Pseudo units to help modeling of ALU1/2 round-robin dispatch strategy.
44 ;; Reservations for ALU1 (ALU2) instructions.
45 ;; Instruction goes to ALU1 (ALU2) and makes next ALU1/2 instruction to
46 ;; be dispatched to ALU2 (ALU1).
52 ;; Reservation for ALU1/2 instructions.
53 ;; Instruction will go to ALU1 iff ls2_alu1_turn_enabled is subscribed and
H A D10000.md25 ;; The int queue feeds ALU1 and ALU2.
87 ;; ALU1 handles shifts, branch eval, and condmove.
89 ;; Brancher is separate, but part of ALU1, but can only
107 ;; mtc1/dmtc1 are handled by ALU1.
/netbsd/external/gpl3/gcc/dist/gcc/config/mips/
H A Dloongson2ef.md30 ;; ALU1 and ALU2.
34 ;; Pseudo units to help modeling of ALU1/2 round-robin dispatch strategy.
44 ;; Reservations for ALU1 (ALU2) instructions.
45 ;; Instruction goes to ALU1 (ALU2) and makes next ALU1/2 instruction to
46 ;; be dispatched to ALU2 (ALU1).
52 ;; Reservation for ALU1/2 instructions.
53 ;; Instruction will go to ALU1 iff ls2_alu1_turn_enabled is subscribed and
H A D10000.md25 ;; The int queue feeds ALU1 and ALU2.
87 ;; ALU1 handles shifts, branch eval, and condmove.
89 ;; Brancher is separate, but part of ALU1, but can only
107 ;; mtc1/dmtc1 are handled by ALU1.
/netbsd/external/gpl3/gdb/dist/include/opcode/
H A Dnds32.h77 N32_TYPE4 (ALU1, rt, ra, rb, 0, N32_ALU1_##sub)
79 N32_TYPE4 (ALU1, rt, ra, rb, rd, N32_ALU1_##sub)
/netbsd/external/gpl3/binutils.old/dist/include/opcode/
H A Dnds32.h77 N32_TYPE4 (ALU1, rt, ra, rb, 0, N32_ALU1_##sub)
79 N32_TYPE4 (ALU1, rt, ra, rb, rd, N32_ALU1_##sub)
/netbsd/external/gpl3/binutils/dist/include/opcode/
H A Dnds32.h77 N32_TYPE4 (ALU1, rt, ra, rb, 0, N32_ALU1_##sub)
79 N32_TYPE4 (ALU1, rt, ra, rb, rd, N32_ALU1_##sub)
/netbsd/external/gpl3/gdb.old/dist/include/opcode/
H A Dnds32.h77 N32_TYPE4 (ALU1, rt, ra, rb, 0, N32_ALU1_##sub)
79 N32_TYPE4 (ALU1, rt, ra, rb, rd, N32_ALU1_##sub)
/netbsd/external/gpl3/gcc.old/dist/gcc/config/aarch64/
H A Dtsv110.md230 ;; 1. Three pipelines for integer operations: ALU1, ALU2, ALU3
/netbsd/external/gpl3/gcc/dist/gcc/config/aarch64/
H A Dtsv110.md230 ;; 1. Three pipelines for integer operations: ALU1, ALU2, ALU3
/netbsd/external/gpl3/binutils/dist/gas/config/
H A Dtc-nds32.c5068 OP6 (ALU1),
5109 OP6 (ALU1),
5132 OP6(ALU1),
5188 OP6 (ALU1),
/netbsd/external/gpl3/gdb/dist/gas/config/
H A Dtc-nds32.c5069 OP6 (ALU1),
5110 OP6 (ALU1),
5133 OP6(ALU1),
5189 OP6 (ALU1),
/netbsd/external/gpl3/binutils.old/dist/gas/config/
H A Dtc-nds32.c5078 OP6 (ALU1),
5119 OP6 (ALU1),
5142 OP6(ALU1),
5198 OP6 (ALU1),

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