| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| H A D | AMDGPUInstPrinter.cpp | 1283 static void printSwizzleBitmask(const uint16_t AndMask, in printSwizzleBitmask() argument
1289 uint16_t Probe0 = ((0 & AndMask) | OrMask) ^ XorMask; in printSwizzleBitmask()
1290 uint16_t Probe1 = ((BITMASK_MASK & AndMask) | OrMask) ^ XorMask; in printSwizzleBitmask()
1340 uint16_t AndMask = (Imm >> BITMASK_AND_SHIFT) & BITMASK_MASK; in printSwizzle() local
1344 if (AndMask == BITMASK_MAX && in printSwizzle()
1353 } else if (AndMask == BITMASK_MAX && in printSwizzle()
1364 uint16_t GroupSize = BITMASK_MAX - AndMask + 1; in printSwizzle()
1380 printSwizzleBitmask(AndMask, OrMask, XorMask, O); in printSwizzle()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineSelect.cpp | 138 APInt AndMask; in foldSelectICmpAnd() local
150 AndMask = *AndRHS; in foldSelectICmpAnd()
152 Pred, V, AndMask)) { in foldSelectICmpAnd()
154 if (!AndMask.isPowerOf2()) in foldSelectICmpAnd()
172 if (TC.getBitWidth() != AndMask.getBitWidth() || (TC ^ FC) != AndMask) in foldSelectICmpAnd()
179 V = Builder.CreateAnd(V, ConstantInt::get(SelType, AndMask)); in foldSelectICmpAnd()
207 unsigned AndZeros = AndMask.logBase2(); in foldSelectICmpAnd()
211 V = Builder.CreateAnd(V, ConstantInt::get(V->getType(), AndMask)); in foldSelectICmpAnd()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelDAGToDAG.cpp | 1226 const APInt &AndMask = N->getConstantOperandAPInt(1); in selectShiftMask() local
1231 APInt ShMask(AndMask.getBitWidth(), ShiftWidth - 1); in selectShiftMask()
1233 if (ShMask.isSubsetOf(AndMask)) { in selectShiftMask()
1241 if (ShMask.isSubsetOf(AndMask | Known.Zero)) { in selectShiftMask()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelDAGToDAG.cpp | 738 uint64_t AndMask = MaskNode->getZExtValue(); in detectOrAndInsertion() local
739 if (InsertMask & AndMask) in detectOrAndInsertion()
745 if (Used != (AndMask | InsertMask)) { in detectOrAndInsertion()
747 if (Used != (AndMask | InsertMask | Known.Zero.getZExtValue())) in detectOrAndInsertion()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Transforms/Instrumentation/ |
| H A D | MemorySanitizer.cpp | 351 uint64_t AndMask; member
910 CustomMapParams.AndMask = ClAndMask; in initializeModule()
1465 uint64_t AndMask = MS.MapParams->AndMask; in getShadowPtrOffset() local
1466 if (AndMask) in getShadowPtrOffset()
1468 IRB.CreateAnd(OffsetLong, ConstantInt::get(MS.IntptrTy, ~AndMask)); in getShadowPtrOffset()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 584 uint64_t AndMask = CSD->getZExtValue(); in getExtendTypeForNode() local
586 switch (AndMask) { in getExtendTypeForNode()
1907 uint64_t AndMask = 0; in isSeveralBitsExtractOpFromShr() local
1908 if (!isOpcWithIntImmediate(N->getOperand(0).getNode(), ISD::AND, AndMask)) in isSeveralBitsExtractOpFromShr()
1918 unsigned BitWide = 64 - countLeadingOnes(~(AndMask >> SrlImm)); in isSeveralBitsExtractOpFromShr()
1919 if (BitWide && isMask_64(AndMask >> SrlImm)) { in isSeveralBitsExtractOpFromShr()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Transforms/Utils/ |
| H A D | Local.cpp | 2969 const APInt &AndMask = *C; in collectBitParts() local
2973 unsigned NumMaskedBits = AndMask.countPopulation(); in collectBitParts()
2985 if (AndMask[BitIdx] == 0) in collectBitParts()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 6575 encodeBitmaskPerm(const unsigned AndMask, in encodeBitmaskPerm() argument
6581 (AndMask << BITMASK_AND_SHIFT) | in encodeBitmaskPerm()
6727 unsigned AndMask = 0; in parseSwizzleBitmaskPerm() local
6743 AndMask |= Mask; in parseSwizzleBitmaskPerm()
6746 AndMask |= Mask; in parseSwizzleBitmaskPerm()
6752 Imm = encodeBitmaskPerm(AndMask, OrMask, XorMask); in parseSwizzleBitmaskPerm()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 5793 uint64_t AndMask = *MaybeAndMask; in getExtendTypeForInst() local
5794 switch (AndMask) { in getExtendTypeForInst()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 5146 const APInt &AndMask = CAnd->getAPIntValue(); in visitANDLike() local
5153 unsigned MaskBits = AndMask.countTrailingOnes(); in visitANDLike()
5156 if (AndMask.isMask() && in visitANDLike()
5178 SDValue NewMask = DAG.getConstant(AndMask.trunc(Size / 2), SL, HalfVT); in visitANDLike()
22331 const APInt &AndMask = ConstAndRHS->getAPIntValue(); in SimplifySelectCC() local
22332 unsigned ShCt = AndMask.getBitWidth() - 1; in SimplifySelectCC()
22335 DAG.getConstant(AndMask.countLeadingZeros(), SDLoc(AndLHS), in SimplifySelectCC()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 16133 uint32_t AndMask = static_cast<uint32_t>(AndMaskNode->getZExtValue()); in PerformShiftCombine() local
16135 if (AndMask == 255 || AndMask == 65535) in PerformShiftCombine()
16137 if (isMask_32(AndMask)) { in PerformShiftCombine()
16138 uint32_t MaskedBits = countLeadingZeros(AndMask); in PerformShiftCombine()
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| /netbsd/external/apache2/llvm/dist/clang/lib/CodeGen/ |
| H A D | CGBuiltin.cpp | 3010 APInt AndMask = APInt::getSignedMaxValue(bitsize); in EmitBuiltinExpr() local
3012 Builder.CreateAnd(IntV, llvm::ConstantInt::get(IntTy, AndMask)); in EmitBuiltinExpr()
|