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Searched refs:BrCond (Results 1 – 10 of 10) sorted by relevance

/netbsd/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DIfConversion.cpp896 if (TrueBBI.BrCond.size() == 0 || in ValidForkedDiamond()
897 FalseBBI.BrCond.size() == 0) in ValidForkedDiamond()
1029 BBI.BrCond.clear(); in AnalyzeBranches()
1035 BBI.BrCond.clear(); in AnalyzeBranches()
1038 SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.end()); in AnalyzeBranches()
1043 if (BBI.BrCond.size()) { in AnalyzeBranches()
1196 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end()); in FeasibilityAnalysis()
1286 RevCond(BBI.BrCond.begin(), BBI.BrCond.end()); in AnalyzeBlock()
1540 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end()); in IfConvertSimple()
1626 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end()); in IfConvertTriangle()
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H A DMachinePipeliner.cpp344 LI.BrCond.clear(); in canPipelineLoop()
345 if (TII->analyzeBranch(*L.getHeader(), LI.TBB, LI.FBB, LI.BrCond)) { in canPipelineLoop()
/netbsd/external/apache2/llvm/dist/llvm/lib/Transforms/Vectorize/
H A DVPlanHCFGBuilder.cpp299 Value *BrCond = Br->getCondition(); in buildPlainCFG() local
302 assert(IRDef2VPValue.count(BrCond) && in buildPlainCFG()
304 VPValue *VPCondBit = IRDef2VPValue[BrCond]; in buildPlainCFG()
/netbsd/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/
H A DCombinerHelper.h166 bool matchOptBrCondByInvertingCond(MachineInstr &MI, MachineInstr *&BrCond);
167 void applyOptBrCondByInvertingCond(MachineInstr &MI, MachineInstr *&BrCond);
/netbsd/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/
H A DCombinerHelper.cpp1069 BrCond = &*std::prev(BrIt); in matchOptBrCondByInvertingCond()
1070 if (BrCond->getOpcode() != TargetOpcode::G_BRCOND) in matchOptBrCondByInvertingCond()
1075 MachineBasicBlock *BrCondTarget = BrCond->getOperand(1).getMBB(); in matchOptBrCondByInvertingCond()
1083 Builder.setInstrAndDebugLoc(*BrCond); in applyOptBrCondByInvertingCond()
1084 LLT Ty = MRI.getType(BrCond->getOperand(0).getReg()); in applyOptBrCondByInvertingCond()
1090 auto Xor = Builder.buildXor(Ty, BrCond->getOperand(0), True); in applyOptBrCondByInvertingCond()
1092 auto *FallthroughBB = BrCond->getOperand(1).getMBB(); in applyOptBrCondByInvertingCond()
1099 Observer.changingInstr(*BrCond); in applyOptBrCondByInvertingCond()
1100 BrCond->getOperand(0).setReg(Xor.getReg(0)); in applyOptBrCondByInvertingCond()
1101 BrCond->getOperand(1).setMBB(BrTarget); in applyOptBrCondByInvertingCond()
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H A DIRTranslator.cpp797 auto BrCond = MIB.buildBrCond(Cmp.getReg(0), *JT.Default); in emitJumpTableHeader() local
801 BrCond = MIB.buildBr(*JT.MBB); in emitJumpTableHeader()
/netbsd/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DMachinePipeliner.h80 SmallVector<MachineOperand, 4> BrCond; member
/netbsd/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DAMDGPULegalizerInfo.cpp4693 if (MachineInstr *BrCond = in legalizeIntrinsic() local
4701 MachineBasicBlock *CondBrTarget = BrCond->getOperand(1).getMBB(); in legalizeIntrinsic()
4706 B.setInsertPt(B.getMBB(), BrCond->getIterator()); in legalizeIntrinsic()
4731 BrCond->eraseFromParent(); in legalizeIntrinsic()
4741 if (MachineInstr *BrCond = in legalizeIntrinsic() local
4746 MachineBasicBlock *CondBrTarget = BrCond->getOperand(1).getMBB(); in legalizeIntrinsic()
4752 B.setInsertPt(B.getMBB(), BrCond->getIterator()); in legalizeIntrinsic()
4763 BrCond->eraseFromParent(); in legalizeIntrinsic()
/netbsd/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGBuilder.cpp2514 SDValue BrCond = DAG.getNode(ISD::BRCOND, dl, in visitSwitchCase() local
2521 BrCond = DAG.getNode(ISD::BR, dl, MVT::Other, BrCond, in visitSwitchCase()
2524 DAG.setRoot(BrCond); in visitSwitchCase()
2577 SDValue BrCond = DAG.getNode(ISD::BRCOND, dl, in visitJumpTableHeader() local
2583 BrCond = DAG.getNode(ISD::BR, dl, MVT::Other, BrCond, in visitJumpTableHeader()
2586 DAG.setRoot(BrCond); in visitJumpTableHeader()
2701 SDValue BrCond = DAG.getNode(ISD::BRCOND, dl, in visitSPDescriptorParent() local
2706 MVT::Other, BrCond, in visitSPDescriptorParent()
10536 SDValue BrCond = in lowerWorkItem() local
10540 BrCond = DAG.getNode(ISD::BR, DL, MVT::Other, BrCond, in lowerWorkItem()
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/netbsd/external/apache2/llvm/dist/llvm/lib/Transforms/Utils/
H A DSimplifyCFG.cpp2357 Value *BrCond = BI->getCondition(); in SpeculativelyExecuteBB() local
2358 if (isa<FCmpInst>(BrCond)) in SpeculativelyExecuteBB()
2470 BrCond, TrueV, FalseV, "spec.store.select", BI); in SpeculativelyExecuteBB()
2516 Value *V = Builder.CreateSelect(BrCond, TrueV, FalseV, "spec.select", BI); in SpeculativelyExecuteBB()
2945 Value *BrCond = BI->getCondition(); in SimplifyCondBranchToTwoReturns() local
2953 Builder.CreateSelect(BrCond, TrueValue, FalseValue, "retval", BI); in SimplifyCondBranchToTwoReturns()