Searched refs:CmpOpc (Results 1 – 8 of 8) sorted by relevance
| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCFastISel.cpp | 861 unsigned CmpOpc; in PPCEmitCmp() local
874 CmpOpc = PPC::EFSCMPEQ; in PPCEmitCmp()
877 CmpOpc = PPC::EFSCMPLT; in PPCEmitCmp()
880 CmpOpc = PPC::EFSCMPGT; in PPCEmitCmp()
884 CmpOpc = PPC::FCMPUS; in PPCEmitCmp()
896 CmpOpc = PPC::EFDCMPEQ; in PPCEmitCmp()
899 CmpOpc = PPC::EFDCMPLT; in PPCEmitCmp()
902 CmpOpc = PPC::EFDCMPGT; in PPCEmitCmp()
906 CmpOpc = PPC::XSCMPUDP; in PPCEmitCmp()
908 CmpOpc = PPC::FCMPUD; in PPCEmitCmp()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | Mips16ISelLowering.cpp | 702 Mips16TargetLowering::emitFEXT_T8I816_ins(unsigned BtOpc, unsigned CmpOpc, in emitFEXT_T8I816_ins() argument
711 BuildMI(*BB, MI, MI.getDebugLoc(), TII->get(CmpOpc)) in emitFEXT_T8I816_ins()
728 unsigned CmpOpc; in emitFEXT_T8I8I16_ins() local
730 CmpOpc = CmpiOpc; in emitFEXT_T8I8I16_ins()
733 CmpOpc = CmpiXOpc; in emitFEXT_T8I8I16_ins()
736 BuildMI(*BB, MI, MI.getDebugLoc(), TII->get(CmpOpc)).addReg(regX).addImm(imm); in emitFEXT_T8I8I16_ins()
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| H A D | Mips16ISelLowering.h | 64 MachineBasicBlock *emitFEXT_T8I816_ins(unsigned BtOpc, unsigned CmpOpc,
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMFastISel.cpp | 1375 unsigned CmpOpc; in ARMEmitCmp() local
1383 CmpOpc = UseImm ? ARM::VCMPZS : ARM::VCMPS; in ARMEmitCmp()
1387 CmpOpc = UseImm ? ARM::VCMPZD : ARM::VCMPD; in ARMEmitCmp()
1397 CmpOpc = ARM::t2CMPrr; in ARMEmitCmp()
1399 CmpOpc = isNegativeImm ? ARM::t2CMNri : ARM::t2CMPri; in ARMEmitCmp()
1402 CmpOpc = ARM::CMPrr; in ARMEmitCmp()
1404 CmpOpc = isNegativeImm ? ARM::CMNri : ARM::CMPri; in ARMEmitCmp()
1428 const MCInstrDesc &II = TII.get(CmpOpc); in ARMEmitCmp()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonHardwareLoops.cpp | 1595 static bool isImmValidForOpcode(unsigned CmpOpc, int64_t Imm) { in isImmValidForOpcode() argument
1597 if (CmpOpc == Hexagon::A4_cmpbeqi) in isImmValidForOpcode()
1599 if (CmpOpc == Hexagon::A4_cmpbgti) in isImmValidForOpcode()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 4964 unsigned Opc, CmpOpc; in selectAtomicCmpXchg() local
4969 CmpOpc = AArch64::SUBSWrs; in selectAtomicCmpXchg()
4973 CmpOpc = AArch64::SUBSXrs; in selectAtomicCmpXchg()
5000 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(CmpOpc)) in selectAtomicCmpXchg()
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| H A D | AArch64ISelLowering.cpp | 15231 unsigned CmpOpc = Cmp.getOpcode(); in performBRCONDCombine() local
15232 if (CmpOpc != AArch64ISD::ADDS && CmpOpc != AArch64ISD::SUBS) in performBRCONDCombine()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 4307 unsigned CmpOpc = CmpOpcTbl[ShouldUseImm][OpSize == 64]; in emitFPCompare() local
4311 auto CmpMI = MIRBuilder.buildInstr(CmpOpc).addUse(LHS); in emitFPCompare()
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