/netbsd/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 595 return TLO.CombineTo(Op, Z); in ShrinkDemandedOp() 1244 return TLO.CombineTo(Op, Op0); in SimplifyDemandedBits() 1468 return TLO.CombineTo( in SimplifyDemandedBits() 1489 return TLO.CombineTo( in SimplifyDemandedBits() 1512 return TLO.CombineTo( in SimplifyDemandedBits() 1576 return TLO.CombineTo( in SimplifyDemandedBits() 1651 return TLO.CombineTo( in SimplifyDemandedBits() 1821 return TLO.CombineTo(Op, in SimplifyDemandedBits() 2049 return TLO.CombineTo( in SimplifyDemandedBits() 2138 return TLO.CombineTo(Op, in SimplifyDemandedBits() [all …]
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H A D | DAGCombiner.cpp | 2819 return CombineTo( in visitADDO() 3122 return CombineTo( in visitADDCARRYLike() 5688 CombineTo(N, Zext); in visitAND() 10504 CombineTo(N, NewValue); in CombineExtLoad() 10577 CombineTo(N, And); in CombineZExtLogicopShiftLoad() 10883 CombineTo(N, And); in visitSIGN_EXTEND() 11232 CombineTo(N, And); in visitZERO_EXTEND() 11917 CombineTo(N, ExtLoad); in visitSIGN_EXTEND_INREG() 11933 CombineTo(N, ExtLoad); in visitSIGN_EXTEND_INREG() 14684 CombineTo(N, ExtLoad); in visitFP_EXTEND() [all …]
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/netbsd/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
H A D | TargetLowering.h | 3277 bool CombineTo(SDValue O, SDValue N) { in CombineTo() function 3516 SDValue CombineTo(SDNode *N, ArrayRef<SDValue> To, bool AddTo = true); 3517 SDValue CombineTo(SDNode *N, SDValue Res, bool AddTo = true); 3518 SDValue CombineTo(SDNode *N, SDValue Res0, SDValue Res1, bool AddTo = true);
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 38476 return TLO.CombineTo( in SimplifyDemandedVectorEltsForTargetNode() 38504 return TLO.CombineTo( in SimplifyDemandedVectorEltsForTargetNode() 38543 return TLO.CombineTo( in SimplifyDemandedVectorEltsForTargetNode() 38598 return TLO.CombineTo(Op, in SimplifyDemandedVectorEltsForTargetNode() 38912 return TLO.CombineTo( in SimplifyDemandedVectorEltsForTargetNode() 39010 return TLO.CombineTo( in SimplifyDemandedBitsForTargetNode() 39123 return TLO.CombineTo( in SimplifyDemandedBitsForTargetNode() 39161 return TLO.CombineTo( in SimplifyDemandedBitsForTargetNode() 39310 return TLO.CombineTo( in SimplifyDemandedBitsForTargetNode() 47990 DCI.CombineTo(N, Setcc); in combineSext() [all …]
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 13256 DCI.CombineTo(N, Res, false); in PerformMULCombine() 13526 DCI.CombineTo(N, Res, false); in PerformORCombineToBFI() 13553 DCI.CombineTo(N, Res, false); in PerformORCombineToBFI() 13570 DCI.CombineTo(N, Res, false); in PerformORCombineToBFI() 13591 DCI.CombineTo(N, Res, false); in PerformORCombineToBFI() 14818 DCI.CombineTo(N, NewResults); in CombineBaseUpdate() 14947 DCI.CombineTo(N, NewResults); in PerformMVEVLDCombine() 15032 DCI.CombineTo(VLD, VLDDupResults); in CombineVLDDUP() 18241 return TLO.CombineTo(Op, Op.getOperand(0)); in targetShrinkDemandedConstant() 18252 return TLO.CombineTo(Op, NewOp); in targetShrinkDemandedConstant() [all …]
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 1641 return TLO.CombineTo(Op, New); in optimizeLogicalImm() 14775 DCI.CombineTo(LD, NewResults); in performPostLD1Combine() 14776 DCI.CombineTo(N, SDValue(UpdN.getNode(), 0)); // Dup/Inserted Result in performPostLD1Combine() 14777 DCI.CombineTo(User, SDValue(UpdN.getNode(), 1)); // Write back register in performPostLD1Combine() 14945 DCI.CombineTo(N, NewResults); in performNEONPostLDSTCombine() 14946 DCI.CombineTo(User, SDValue(UpdN.getNode(), NumResultVecs)); in performNEONPostLDSTCombine() 15266 DCI.CombineTo(N, BR, false); in performBRCONDCombine() 15952 DCI.CombineTo(N, ExtLoad); in performSignExtendInRegCombine() 15953 DCI.CombineTo(Src.getNode(), ExtLoad, ExtLoad.getValue(1)); in performSignExtendInRegCombine() 17963 return TLO.CombineTo(Op, ShiftR->getOperand(0)); in SimplifyDemandedBitsForTargetNode()
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.cpp | 5527 return DCI.CombineTo(N, Op0.getOperand(0), Op0.getOperand(1)); in PerformDAGCombine() 5538 return DCI.CombineTo(N, Lo, Hi); in PerformDAGCombine() 5557 return DCI.CombineTo(N, Lo, NewHi); in PerformDAGCombine() 5562 return DCI.CombineTo(N, Lo, NewHi); in PerformDAGCombine() 6010 return TLO.CombineTo(Op, NewOp); in targetShrinkDemandedConstant()
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 5883 DCI.CombineTo(N0.getNode(), TruncSelect); in combineZERO_EXTEND() 6127 DCI.CombineTo(N, ESLoad); in combineVECTOR_SHUFFLE() 6131 DCI.CombineTo(Load.getNode(), ESLoad, ESLoad.getValue(1)); in combineVECTOR_SHUFFLE() 6393 DCI.CombineTo(N, ResVal); in combineBSWAP() 6397 DCI.CombineTo(Load.getNode(), ResVal, BSLoad.getValue(1)); in combineBSWAP()
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 14920 DCI.CombineTo(Bitcast2, FloatLoad); in PerformDAGCombine() 14921 DCI.CombineTo(Bitcast, FloatLoad2); in PerformDAGCombine() 15058 DCI.CombineTo(N, Perm, TF); in PerformDAGCombine() 15203 DCI.CombineTo(N, ResVal); in PerformDAGCombine() 15207 DCI.CombineTo(Load.getNode(), ResVal, BSLoad.getValue(1)); in PerformDAGCombine()
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelLowering.cpp | 4506 DCI.CombineTo(N, Val, AddTo); in PerformANDCombine()
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelLowering.cpp | 2914 DCI.CombineTo(N, BC, NewLoad.getValue(1)); in performLoadCombine()
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