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Searched refs:DP_AUX_CH_CTL (Results 1 – 4 of 4) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/i915/gvt/
H A Dhandlers.c832 if (reg == i915_mmio_reg_offset(DP_AUX_CH_CTL(AUX_CH_A))) in trigger_aux_channel_interrupt()
835 reg == i915_mmio_reg_offset(DP_AUX_CH_CTL(AUX_CH_B))) in trigger_aux_channel_interrupt()
838 reg == i915_mmio_reg_offset(DP_AUX_CH_CTL(AUX_CH_C))) in trigger_aux_channel_interrupt()
841 reg == i915_mmio_reg_offset(DP_AUX_CH_CTL(AUX_CH_D))) in trigger_aux_channel_interrupt()
2900 MMIO_F(DP_AUX_CH_CTL(AUX_CH_B), 6 * 4, 0, 0, 0, D_SKL_PLUS, NULL, in init_skl_mmio_info()
2902 MMIO_F(DP_AUX_CH_CTL(AUX_CH_C), 6 * 4, 0, 0, 0, D_SKL_PLUS, NULL, in init_skl_mmio_info()
2904 MMIO_F(DP_AUX_CH_CTL(AUX_CH_D), 6 * 4, 0, 0, 0, D_SKL_PLUS, NULL, in init_skl_mmio_info()
/netbsd/sys/external/bsd/drm2/dist/drm/i915/display/
H A Dintel_dp.c1626 return DP_AUX_CH_CTL(aux_ch); in g4x_aux_ctl_reg()
1629 return DP_AUX_CH_CTL(AUX_CH_B); in g4x_aux_ctl_reg()
1658 return DP_AUX_CH_CTL(aux_ch); in ilk_aux_ctl_reg()
1665 return DP_AUX_CH_CTL(AUX_CH_A); in ilk_aux_ctl_reg()
1702 return DP_AUX_CH_CTL(aux_ch); in skl_aux_ctl_reg()
1705 return DP_AUX_CH_CTL(AUX_CH_A); in skl_aux_ctl_reg()
H A Dintel_display_power.c564 val = I915_READ(DP_AUX_CH_CTL(aux_ch)); in icl_tc_phy_aux_power_well_enable()
568 I915_WRITE(DP_AUX_CH_CTL(aux_ch), val); in icl_tc_phy_aux_power_well_enable()
/netbsd/sys/external/bsd/drm2/dist/drm/i915/
H A Di915_reg.h5656 #define DP_AUX_CH_CTL(aux_ch) _MMIO_PORT(aux_ch, _DPA_AUX_CH_CTL, _DPB_AUX_CH_CTL) macro