Searched refs:FMINNUM_IEEE (Results 1 – 16 of 16) sorted by relevance
| /netbsd/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 895 FMINNUM_IEEE, enumerator
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| H A D | TargetLowering.h | 2442 case ISD::FMINNUM_IEEE: in isCommutativeBinOp()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 188 case ISD::FMINNUM_IEEE: return "fminnum_ieee"; in getOperationName()
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| H A D | LegalizeVectorOps.cpp | 410 case ISD::FMINNUM_IEEE: in LegalizeOp()
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| H A D | LegalizeVectorTypes.cpp | 119 case ISD::FMINNUM_IEEE: in ScalarizeVectorResult()
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| H A D | TargetLowering.cpp | 6883 ISD::FMINNUM_IEEE : ISD::FMAXNUM_IEEE; in expandFMINNUM_FMAXNUM()
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| H A D | SelectionDAG.cpp | 4352 case ISD::FMINNUM_IEEE: in isKnownNeverNaN()
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| H A D | DAGCombiner.cpp | 9192 unsigned IEEEOpcode = (LHS == True) ? ISD::FMINNUM_IEEE : ISD::FMAXNUM_IEEE; in combineMinNumMaxNum()
9207 unsigned IEEEOpcode = (LHS == True) ? ISD::FMAXNUM_IEEE : ISD::FMINNUM_IEEE; in combineMinNumMaxNum()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 467 setOperationAction(ISD::FMINNUM_IEEE, MVT::f32, Legal); in SITargetLowering()
469 setOperationAction(ISD::FMINNUM_IEEE, MVT::f64, Legal); in SITargetLowering()
655 setOperationAction(ISD::FMINNUM_IEEE, MVT::f16, Legal); in SITargetLowering()
657 setOperationAction(ISD::FMINNUM_IEEE, MVT::v4f16, Custom); in SITargetLowering()
685 setOperationAction(ISD::FMINNUM_IEEE, MVT::v2f16, Legal); in SITargetLowering()
805 setTargetDAGCombine(ISD::FMINNUM_IEEE); in SITargetLowering()
4545 case ISD::FMINNUM_IEEE: in LowerOperation()
9569 case ISD::FMINNUM_IEEE: in isCanonicalized()
9833 case ISD::FMINNUM_IEEE: in minMaxOpcToMin3Max3Opc()
10174 case ISD::FMINNUM_IEEE: { in performExtractVectorEltCombine()
[all …]
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| H A D | AMDGPUISelLowering.cpp | 593 case ISD::FMINNUM_IEEE: in fnegFoldsIntoOp()
3633 return ISD::FMINNUM_IEEE; in inverseMinMax()
3634 case ISD::FMINNUM_IEEE: in inverseMinMax()
3749 case ISD::FMINNUM_IEEE: in performFNegCombine()
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| /netbsd/external/apache2/llvm/dist/llvm/include/llvm/Target/ |
| H A D | GenericOpcodes.td | 757 // FMINNUM_IEEE/FMAXNUM_IEEE - Perform floating-point minimum or maximum on
776 // as less than 0.0. While FMINNUM_IEEE/FMAXNUM_IEEE follow IEEE 754-2008
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| H A D | TargetSelectionDAG.td | 466 def fminnum_ieee : SDNode<"ISD::FMINNUM_IEEE", SDTFPBinOp,
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| /netbsd/external/apache2/llvm/dist/llvm/docs/GlobalISel/ |
| H A D | GenericOpcode.rst | 513 FMINNUM_IEEE follow IEEE 754-2008 semantics, FMINIMUM follows IEEE 754-2018
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| /netbsd/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 744 setOperationAction(ISD::FMINNUM_IEEE, VT, Expand); in initActions()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 710 setOperationAction(ISD::FMINNUM_IEEE, MVT::f64, Legal); in PPCTargetLowering()
711 setOperationAction(ISD::FMINNUM_IEEE, MVT::f32, Legal); in PPCTargetLowering()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 40811 case ISD::FMINNUM_IEEE: in scalarizeExtEltFP()
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