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Searched refs:MIMGBaseOpcodeInfo (Results 1 – 9 of 9) sorted by relevance

/netbsd/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/Utils/
H A DAMDGPUBaseInfo.h280 struct MIMGBaseOpcodeInfo { struct
298 const MIMGBaseOpcodeInfo *getMIMGBaseOpcodeInfo(unsigned BaseOpcode); argument
351 unsigned getAddrSizeMIMGOp(const MIMGBaseOpcodeInfo *BaseOpcode,
H A DAMDGPUBaseInfo.cpp145 const MIMGBaseOpcodeInfo *getMIMGBaseOpcode(unsigned Opc) { in getMIMGBaseOpcode()
158 unsigned getAddrSizeMIMGOp(const MIMGBaseOpcodeInfo *BaseOpcode, in getAddrSizeMIMGOp()
/netbsd/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/Disassembler/
H A DAMDGPUDisassembler.cpp720 const AMDGPU::MIMGBaseOpcodeInfo *BaseOpcode = in convertMIMGInst()
/netbsd/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DMIMGInstructions.td54 let CppTypeName = "MIMGBaseOpcodeInfo";
H A DAMDGPUInstructionSelector.cpp1469 const AMDGPU::MIMGBaseOpcodeInfo *BaseOpcode = in selectImageIntrinsic()
H A DAMDGPULegalizerInfo.cpp4123 const AMDGPU::MIMGBaseOpcodeInfo *BaseOpcode = in legalizeImageIntrinsic()
H A DSIISelLowering.cpp1045 const AMDGPU::MIMGBaseOpcodeInfo *BaseOpcode = in getTgtMemIntrinsic()
5964 const AMDGPU::MIMGBaseOpcodeInfo *BaseOpcode = in lowerImage()
H A DSIInstrInfo.cpp4204 const AMDGPU::MIMGBaseOpcodeInfo *BaseOpcode = in verifyInstruction()
/netbsd/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp3419 const AMDGPU::MIMGBaseOpcodeInfo *BaseOpcode = in validateMIMGAddrSize()
3501 const AMDGPU::MIMGBaseOpcodeInfo *BaseOpcode = in validateMIMGMSAA()