| /netbsd/external/gpl3/gdb/dist/opcodes/ |
| H A D | v850-opc.c | 1062 #define MOVCC (CCCC_NOTSA + 1) macro
1066 #define FLOAT_CCCC (MOVCC + 1)
1450 { "cmov", two (0x07e0, 0x0320), two (0x07e0, 0x07e1), {MOVCC, R1, R2, R3}, 0, PROCESSOR_NOT_V850 …
1451 { "cmov", two (0x07e0, 0x0300), two (0x07e0, 0x07e1), {MOVCC, I5, R2, R3}, 0, PROCESSOR_NOT_V850 …
|
| /netbsd/external/gpl3/binutils.old/dist/opcodes/ |
| H A D | v850-opc.c | 1068 #define MOVCC (CCCC_NOTSA + 1) macro
1072 #define FLOAT_CCCC (MOVCC + 1)
1456 { "cmov", two (0x07e0, 0x0320), two (0x07e0, 0x07e1), {MOVCC, R1, R2, R3}, 0, PROCESSOR_NOT_V850 …
1457 { "cmov", two (0x07e0, 0x0300), two (0x07e0, 0x07e1), {MOVCC, I5, R2, R3}, 0, PROCESSOR_NOT_V850 …
|
| /netbsd/external/gpl3/binutils/dist/opcodes/ |
| H A D | v850-opc.c | 1062 #define MOVCC (CCCC_NOTSA + 1) macro
1066 #define FLOAT_CCCC (MOVCC + 1)
1450 { "cmov", two (0x07e0, 0x0320), two (0x07e0, 0x07e1), {MOVCC, R1, R2, R3}, 0, PROCESSOR_NOT_V850 …
1451 { "cmov", two (0x07e0, 0x0300), two (0x07e0, 0x07e1), {MOVCC, I5, R2, R3}, 0, PROCESSOR_NOT_V850 …
|
| /netbsd/external/gpl3/gdb.old/dist/opcodes/ |
| H A D | v850-opc.c | 1062 #define MOVCC (CCCC_NOTSA + 1) macro
1066 #define FLOAT_CCCC (MOVCC + 1)
1450 { "cmov", two (0x07e0, 0x0320), two (0x07e0, 0x07e1), {MOVCC, R1, R2, R3}, 0, PROCESSOR_NOT_V850 …
1451 { "cmov", two (0x07e0, 0x0300), two (0x07e0, 0x07e1), {MOVCC, I5, R2, R3}, 0, PROCESSOR_NOT_V850 …
|
| /netbsd/external/gpl3/gdb/dist/gas/testsuite/gas/metag/ |
| H A D | metafpu21.s | 1399 F MOVCC FX.0,D0Re0
1464 F MOVCC A0FrP,FX.3
1467 F MOVCC FX.2,A1.3
1469 F MOVCC FX.3,A1.3
1509 F MOVCC FX.3,D0.7
1522 F MOVCC D0Re0,FX.10
1527 F MOVCC A1.3,FX.10
1531 F MOVCC D0Re0,FX.15
1536 F MOVCC A1.3,FX.15
|
| H A D | metafpu21.d | 1407 .*: a3000528 F MOVCC FX\.0,D0Re0
1472 .*: a3186468 F MOVCC A0FrP,FX\.3
1475 .*: a3189128 F MOVCC FX\.2,A1\.3
1477 .*: a318d128 F MOVCC FX\.3,A1\.3
1517 .*: a338c528 F MOVCC FX\.3,D0\.7
1530 .*: a3502428 F MOVCC D0Re0,FX\.10
1535 .*: a350e488 F MOVCC A1\.3,FX\.10
1539 .*: a3782428 F MOVCC D0Re0,FX\.15
1544 .*: a378e488 F MOVCC A1\.3,FX\.15
|
| H A D | metacore21.s | 3080 MOVCC D1.7,PCX define
3097 MOVCC D1.7,TXMASKI define
3161 MOVCC RAM8X,D0.7
|
| H A D | metacore21.d | 3088 .*: a309d448 MOVCC D1\.7,PCX
3105 .*: a319dc48 MOVCC D1\.7,TXMASKI
3169 .*: a33dc4c8 MOVCC RAM8X,D0\.7
|
| /netbsd/external/gpl3/gdb.old/dist/gas/testsuite/gas/metag/ |
| H A D | metafpu21.s | 1399 F MOVCC FX.0,D0Re0
1464 F MOVCC A0FrP,FX.3
1467 F MOVCC FX.2,A1.3
1469 F MOVCC FX.3,A1.3
1509 F MOVCC FX.3,D0.7
1522 F MOVCC D0Re0,FX.10
1527 F MOVCC A1.3,FX.10
1531 F MOVCC D0Re0,FX.15
1536 F MOVCC A1.3,FX.15
|
| H A D | metafpu21.d | 1407 .*: a3000528 F MOVCC FX\.0,D0Re0
1472 .*: a3186468 F MOVCC A0FrP,FX\.3
1475 .*: a3189128 F MOVCC FX\.2,A1\.3
1477 .*: a318d128 F MOVCC FX\.3,A1\.3
1517 .*: a338c528 F MOVCC FX\.3,D0\.7
1530 .*: a3502428 F MOVCC D0Re0,FX\.10
1535 .*: a350e488 F MOVCC A1\.3,FX\.10
1539 .*: a3782428 F MOVCC D0Re0,FX\.15
1544 .*: a378e488 F MOVCC A1\.3,FX\.15
|
| H A D | metacore21.s | 3080 MOVCC D1.7,PCX define
3097 MOVCC D1.7,TXMASKI define
3161 MOVCC RAM8X,D0.7
|
| H A D | metacore21.d | 3088 .*: a309d448 MOVCC D1\.7,PCX
3105 .*: a319dc48 MOVCC D1\.7,TXMASKI
3169 .*: a33dc4c8 MOVCC RAM8X,D0\.7
|
| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMScheduleA57.td | 216 "MOVCC(r|i|i16|i32imm)", "tMOV", "tMVN")>;
|
| /netbsd/external/gpl3/gcc/dist/gcc/ |
| H A D | ChangeLog-2011 | 27025 * config/bfin/bfin.md (MOVCC): New mode_macro.
|