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Searched refs:MRDCK0_RESET (Results 1 – 9 of 9) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/radeon/
H A Dsid.h605 # define MRDCK0_RESET (1 << 16) macro
H A Dcikd.h730 # define MRDCK0_RESET (1 << 16) macro
H A Dradeon_si_dpm.c4574 mclk_pwrmgt_cntl |= MRDCK0_RESET | MRDCK1_RESET; in si_populate_smc_acpi_state()
H A Dradeon_ci_dpm.c3073 mclk_pwrmgt_cntl |= MRDCK0_RESET | MRDCK1_RESET; in ci_populate_smc_acpi_level()
/netbsd/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Dsid.h607 # define MRDCK0_RESET (1 << 16) macro
H A Damdgpu_si_dpm.c5039 mclk_pwrmgt_cntl |= MRDCK0_RESET | MRDCK1_RESET; in si_populate_smc_acpi_state()
/netbsd/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
H A Damdgpu_iceland_smumgr.c1517 MCLK_PWRMGT_CNTL, MRDCK0_RESET, 0x1); in iceland_populate_smc_acpi_level()
H A Damdgpu_ci_smumgr.c1469 MCLK_PWRMGT_CNTL, MRDCK0_RESET, 0x1); in ci_populate_smc_acpi_level()
H A Damdgpu_tonga_smumgr.c1259 MCLK_PWRMGT_CNTL, MRDCK0_RESET, 0x1); in tonga_populate_smc_acpi_level()