1 /* $NetBSD: mvcesareg.h,v 1.3 2021/12/05 02:41:44 msaitoh Exp $ */ 2 /* 3 * Copyright (c) 2008 KIYOHARA Takashi 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 17 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 18 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 19 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 20 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 21 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 23 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 24 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 */ 27 #ifndef _MVCESAREG_H_ 28 #define _MVCESAREG_H_ 29 30 #define MVCESA_SIZE 0x1000 31 32 33 /* 34 * Cryptographic Engine and Security Accelerator Registers 35 */ 36 /* DES Engine Registers */ 37 #define MVCESA_DESE_DOL 0xd78 /* Data Out Low */ 38 #define MVCESA_DESE_DOH 0xd7c /* Data Out High */ 39 #define MVCESA_DESE_DBL 0xd70 /* Data Buffer Low */ 40 #define MVCESA_DESE_DBH 0xd74 /* Data Buffer High */ 41 #define MVCESA_DESE_IVL 0xd40 /* Initial Value Low */ 42 #define MVCESA_DESE_IVH 0xd44 /* Initial Value High */ 43 #define MVCESA_DESE_K0L 0xd48 /* Key0 Low */ 44 #define MVCESA_DESE_K0H 0xd4c /* Key0 High */ 45 #define MVCESA_DESE_K1L 0xd50 /* Key1 Low */ 46 #define MVCESA_DESE_K1H 0xd54 /* Key1 High */ 47 #define MVCESA_DESE_K2L 0xd60 /* Key2 Low */ 48 #define MVCESA_DESE_K2H 0xd64 /* Key2 High */ 49 #define MVCESA_DESE_C 0xd58 /* Command */ 50 #define MVCESA_DESE_C_DIRECTION_ENC (0 << 0) 51 #define MVCESA_DESE_C_DIRECTION_DEC (1 << 0) 52 #define MVCESA_DESE_C_ALGORITHM_DES (0 << 1) 53 #define MVCESA_DESE_C_ALGORITHM_3DES (1 << 1) 54 #define MVCESA_DESE_C_3DESMODE_EEE (0 << 2) 55 #define MVCESA_DESE_C_3DESMODE_EDE (1 << 2) 56 #define MVCESA_DESE_C_DESMODE_ECB (0 << 3) 57 #define MVCESA_DESE_C_DESMODE_CBC (1 << 3) 58 #define MVCESA_DESE_C_DATABYTESWAP (1 << 4) 59 #define MVCESA_DESE_C_IVBYTESWAP (1 << 6) 60 #define MVCESA_DESE_C_OUTBYTESWAP (1 << 8) 61 #define MVCESA_DESE_C_READALLOW (1 << 29) 62 #define MVCESA_DESE_C_ALLTERMINATION (1 << 30) 63 #define MVCESA_DESE_C_TERMINATION (1 << 31) 64 65 /* SHA-1 and MD5 Interface Registers */ 66 #define MVCESA_SHA1MD5I_DI 0xd38 /* Data In */ 67 #define MVCESA_SHA1MD5I_BCL 0xd20 /* Bit Count Low */ 68 #define MVCESA_SHA1MD5I_BCH 0xd24 /* Bit Count High */ 69 #define MVCESA_SHA1MD5I_IVDA 0xd00 /* Initial Value/Digest A */ 70 #define MVCESA_SHA1MD5I_IVDB 0xd04 /* Initial Value/Digest B */ 71 #define MVCESA_SHA1MD5I_IVDC 0xd08 /* Initial Value/Digest C */ 72 #define MVCESA_SHA1MD5I_IVDD 0xd0c /* Initial Value/Digest D */ 73 #define MVCESA_SHA1MD5I_IVDE 0xd10 /* Initial Value/Digest E */ 74 #define MVCESA_SHA1MD5I_AC 0xd18 /* Authentication Command */ 75 #define MVCESA_SHA1MD5I_AC_ALGORITHM_MD5 (0 << 0) 76 #define MVCESA_SHA1MD5I_AC_ALGORITHM_SHA1 (1 << 0) 77 #define MVCESA_SHA1MD5I_AC_MODE_USEIV (0 << 1) 78 #define MVCESA_SHA1MD5I_AC_MODE_CONTINUE (1 << 1) 79 #define MVCESA_SHA1MD5I_AC_DATABYTESWAP (1 << 2) 80 #define MVCESA_SHA1MD5I_AC_IVBYTESWAP (1 << 4) 81 #define MVCESA_SHA1MD5I_AC_TERMINATION (1 << 31) 82 83 /* AES Encryption/Decryption Interface Registers */ 84 #define MVCESA_AES_ENCRYPTION 0xd80 85 #define MVCESA_AES_DECRYPTION 0xdc0 86 #define MVCESA_AES_DIOC_OFF 0x20 /* Data In/Out Column */ 87 #define MVCESA_AES_DIOC_MAX 3 88 #define MVCESA_AES_KC_OFF 0x00 /* Key Column */ 89 #define MVCESA_AES_KC_MAX 7 90 #define MVCESA_AES_C 0x30 /* Command */ 91 #define MVCESA_AES_C_AESKEYMODE_128 (0 << 0) 92 #define MVCESA_AES_C_AESKEYMODE_192 (1 << 0) 93 #define MVCESA_AES_C_AESKEYMODE_256 (2 << 0) 94 #define MVCESA_AES_C_AESDECMAKEKEY (1 << 2) 95 #define MVCESA_AES_C_DATABYTESWAP (1 << 4) 96 #define MVCESA_AES_C_OUTBYTESWAP (1 << 8) 97 #define MVCESA_AES_C_TERMINATION (1 << 31) 98 99 #define MVCESA_AES_DIOC(c) \ 100 (MVCESA_AES_DIOC_OFF + ((c) - MVCESA_AES_DIOC_MAX) * 4) 101 #define MVCESA_AES_KC(c) \ 102 (MVCESA_AES_KC_OFF + ((c) - MVCESA_AES_KC_MAX) * 4) 103 104 105 /* Security Accelerator Registers */ 106 #define MVCESA_SA_C 0xe00 /* Command */ 107 #define MVCESA_SA_DPS0 0xe04 /* Descriptor Pointer Session 0 */ 108 #define MVCESA_SA_DPS1 0xe14 /* Descriptor Pointer Session 1 */ 109 #define MVCESA_SA_CFG 0xe08 /* Configuration */ 110 #define MVCESA_SA_S 0xe0c /* Status */ 111 112 /* Interrupt Cause Registers */ 113 #define MVCESA_IC 0xe20 /* Interrupt Cause */ 114 #define MVCESA_IM 0xe24 /* Interrupt Mask */ 115 #define MVCESA_I_ZINT0 (1 << 0) /* auth termination */ 116 #define MVCESA_I_ZINT1 (1 << 1) /* DES */ 117 #define MVCESA_I_ZINT2 (1 << 2) /* AES encryption */ 118 #define MVCESA_I_ZINT3 (1 << 3) /* AES decryption */ 119 #define MVCESA_I_ZINT4 (1 << 4) /* enc termination */ 120 #define MVCESA_I_ACCINT0 (1 << 5) /* Security accelerator 0 */ 121 #define MVCESA_I_ACCINT1 (1 << 6) /* Security accelerator 1 */ 122 #define MVCESA_I_ACCANDIDMAINT0 (1 << 7) /* Acceleration and IDMA 0 */ 123 #define MVCESA_I_ACCANDIDMAINT1 (1 << 8) /* Acceleration and IDMA 1 */ 124 125 #endif /* _MVCESAREG_H_ */ 126