/netbsd/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
H A D | RISCVISelDAGToDAG.h | 97 uint8_t Masked; member 107 uint8_t Masked; member 117 uint8_t Masked; member 126 uint8_t Masked; member 135 uint8_t Masked; member 144 uint8_t Masked; member 152 uint8_t Masked; member
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H A D | RISCVInstrInfoVPseudos.td | 415 bits<1> Masked = M; 432 bits<1> Masked = M; 448 bits<1> Masked = M; 479 bits<1> Masked = M; 497 bits<1> Masked = M; 515 bits<1> Masked = M; 532 bits<1> Masked = M; 726 RISCVVSE</*Masked*/0, /*Strided*/0, EEW, VLMul> { 742 RISCVVSE</*Masked*/1, /*Strided*/0, EEW, VLMul> { 757 RISCVVSE</*Masked*/0, /*Strided*/1, EEW, VLMul> { [all …]
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
H A D | CaymanInstructions.td | 116 let DST_SEL_Y = 7; // Masked 117 let DST_SEL_Z = 7; // Masked 118 let DST_SEL_W = 7; // Masked 126 let DST_SEL_Y = 7; // Masked 127 let DST_SEL_Z = 7; // Masked 128 let DST_SEL_W = 7; // Masked 138 let DST_SEL_Y = 7; // Masked 139 let DST_SEL_Z = 7; // Masked 140 let DST_SEL_W = 7; // Masked
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H A D | EvergreenInstructions.td | 190 let DST_SEL_Y = 7; // Masked 191 let DST_SEL_Z = 7; // Masked 192 let DST_SEL_W = 7; // Masked 201 let DST_SEL_Y = 7; // Masked 202 let DST_SEL_Z = 7; // Masked 203 let DST_SEL_W = 7; // Masked 214 let DST_SEL_Y = 7; // Masked 215 let DST_SEL_Z = 7; // Masked 216 let DST_SEL_W = 7; // Masked
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/netbsd/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineShifts.cpp | 191 Value *Masked, *ShiftShAmt; in dropRedundantMaskingOfLeftShiftInput() local 193 m_Shift(m_Value(Masked), m_ZExtOrSelf(m_Value(ShiftShAmt)))); in dropRedundantMaskingOfLeftShiftInput() 198 if (match(Masked, m_CombineAnd(m_Trunc(m_Value(Masked)), m_Value(Trunc))) && in dropRedundantMaskingOfLeftShiftInput() 203 Type *WidestTy = Masked->getType(); in dropRedundantMaskingOfLeftShiftInput() 225 if (match(Masked, m_c_And(m_CombineOr(MaskA, MaskB), m_Value(X)))) { in dropRedundantMaskingOfLeftShiftInput() 230 if (!canTryToConstantAddTwoShiftAmounts(OuterShift, ShiftShAmt, Masked, in dropRedundantMaskingOfLeftShiftInput() 255 } else if (match(Masked, m_c_And(m_CombineOr(MaskC, MaskD), m_Value(X))) || in dropRedundantMaskingOfLeftShiftInput() 256 match(Masked, m_Shr(m_Shl(m_Value(X), m_Value(MaskShAmt)), in dropRedundantMaskingOfLeftShiftInput() 262 if (!canTryToConstantAddTwoShiftAmounts(OuterShift, ShiftShAmt, Masked, in dropRedundantMaskingOfLeftShiftInput() 303 if (!Masked->hasOneUse()) in dropRedundantMaskingOfLeftShiftInput() [all …]
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H A D | InstCombineAndOrXor.cpp | 828 Value *Masked = Builder.CreateAnd(L1, Mask); in foldAndOrOfICmpsOfAndWithPow2() local 830 return Builder.CreateICmp(NewPred, Masked, Mask); in foldAndOrOfICmpsOfAndWithPow2()
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H A D | InstCombineCompares.cpp | 1319 Value *Masked = Builder.CreateAnd(X, Mask); in foldIRemByPowerOfTwoToBitTest() local 1320 return ICmpInst::Create(Instruction::ICmp, Pred, Masked, Zero); in foldIRemByPowerOfTwoToBitTest()
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/netbsd/external/apache2/llvm/dist/llvm/lib/Support/ |
H A D | APFixedPoint.cpp | 38 APInt Masked(NewVal & Mask); in convert() local 41 if (!(Masked == Mask || Masked == 0)) { in convert()
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/netbsd/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
H A D | TypePromotion.cpp | 668 Value *Masked = Builder.CreateAnd(Trunc->getOperand(0), Mask); in ConvertTruncs() local 670 if (auto *I = dyn_cast<Instruction>(Masked)) in ConvertTruncs() 673 ReplaceAllUsersOfWith(Trunc, Masked); in ConvertTruncs()
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/netbsd/external/apache2/llvm/dist/llvm/lib/Transforms/Instrumentation/ |
H A D | MemProfiler.cpp | 427 if (auto *Masked = dyn_cast<ConstantInt>(Vector->getOperand(Idx))) { in instrumentMaskedLoadOrStore() local 428 if (Masked->isZero()) in instrumentMaskedLoadOrStore()
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H A D | AddressSanitizer.cpp | 1571 if (auto *Masked = dyn_cast<ConstantInt>(Vector->getOperand(Idx))) { in instrumentMaskedLoadOrStore() local 1572 if (Masked->isZero()) in instrumentMaskedLoadOrStore()
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
H A D | X86InstCombineIntrinsic.cpp | 1006 Value *Masked = IC.Builder.CreateAnd(Input, II.getArgOperand(1)); in instCombineIntrinsic() local 1007 Value *Shifted = IC.Builder.CreateLShr(Masked, in instCombineIntrinsic() 1054 Value *Masked = IC.Builder.CreateAnd(Shifted, II.getArgOperand(1)); in instCombineIntrinsic() local 1055 return IC.replaceInstUsesWith(II, Masked); in instCombineIntrinsic()
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H A D | X86InstrFragmentsSIMD.td | 704 // Masked versions of above 1076 // Masked store fragments.
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H A D | X86ISelDAGToDAG.cpp | 4309 bool FoldedBCast, bool Masked) { in getVPTESTMOpc() argument 4312 if (Masked) \ in getVPTESTMOpc()
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/netbsd/external/apache2/llvm/dist/llvm/include/llvm/IR/ |
H A D | IntrinsicsHexagon.td | 384 // Masked vector stores
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H A D | Intrinsics.td | 1439 //===-------------------------- Masked Intrinsics -------------------------===//
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
H A D | ARMTargetTransformInfo.cpp | 433 if (CCH == TTI::CastContextHint::Masked && DstTy.getSizeInBits() > 128) in getCastInstrCost() 439 CCH == TTI::CastContextHint::Masked) { in getCastInstrCost()
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/netbsd/external/apache2/llvm/dist/llvm/lib/Analysis/ |
H A D | TargetTransformInfo.cpp | 745 return TTI::CastContextHint::Masked; in getCastContextHint()
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/netbsd/external/apache2/llvm/dist/llvm/include/llvm/Analysis/ |
H A D | TargetTransformInfo.h | 1087 Masked, ///< The cast is used with a masked load/store. enumerator
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/netbsd/external/gpl3/gcc.old/dist/gcc/config/gcn/ |
H A D | gcn-valu.md | 2899 /* Masked lanes are required to hold zero. */ 2937 /* Masked lanes are required to hold zero. */
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/netbsd/external/gpl3/gcc/dist/gcc/ |
H A D | tree.def | 1223 Operand 0: OMP_SCOPE_BODY: Masked section body. 1233 Operand 0: OMP_MASKED_BODY: Masked section body.
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/netbsd/external/gpl3/gcc/dist/gcc/config/gcn/ |
H A D | gcn-valu.md | 2931 /* Masked lanes are required to hold zero. */ 2969 /* Masked lanes are required to hold zero. */
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/netbsd/external/apache2/llvm/dist/clang/lib/CodeGen/ |
H A D | CGOpenMPRuntime.cpp | 11325 llvm::SmallVector<char, 2> Masked; in emitX86DeclareSimdFunction() local 11328 Masked.push_back('N'); in emitX86DeclareSimdFunction() 11329 Masked.push_back('M'); in emitX86DeclareSimdFunction() 11332 Masked.push_back('N'); in emitX86DeclareSimdFunction() 11335 Masked.push_back('M'); in emitX86DeclareSimdFunction() 11338 for (char Mask : Masked) { in emitX86DeclareSimdFunction()
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/netbsd/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 5932 SDValue Masked = DAG.getNode(ISD::AND, DL, VT, N, IntMax); in prepareSREMEqFold() local 5933 Created.push_back(Masked.getNode()); in prepareSREMEqFold() 5934 SDValue MaskedIsZero = DAG.getSetCC(DL, SETCCVT, Masked, Zero, Cond); in prepareSREMEqFold()
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/netbsd/external/historical/nawk/dist/testdir/ |
H A D | funstack.ok | 1896 S. L. Watkins ACM Algorithm 483: Masked 3564 Robert Feinstein Remark on ``Algorithm 483: Masked
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