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Searched refs:Masked (Results 1 – 25 of 33) sorted by relevance

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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
H A DRISCVISelDAGToDAG.h97 uint8_t Masked; member
107 uint8_t Masked; member
117 uint8_t Masked; member
126 uint8_t Masked; member
135 uint8_t Masked; member
144 uint8_t Masked; member
152 uint8_t Masked; member
H A DRISCVInstrInfoVPseudos.td415 bits<1> Masked = M;
432 bits<1> Masked = M;
448 bits<1> Masked = M;
479 bits<1> Masked = M;
497 bits<1> Masked = M;
515 bits<1> Masked = M;
532 bits<1> Masked = M;
726 RISCVVSE</*Masked*/0, /*Strided*/0, EEW, VLMul> {
742 RISCVVSE</*Masked*/1, /*Strided*/0, EEW, VLMul> {
757 RISCVVSE</*Masked*/0, /*Strided*/1, EEW, VLMul> {
[all …]
/netbsd/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DCaymanInstructions.td116 let DST_SEL_Y = 7; // Masked
117 let DST_SEL_Z = 7; // Masked
118 let DST_SEL_W = 7; // Masked
126 let DST_SEL_Y = 7; // Masked
127 let DST_SEL_Z = 7; // Masked
128 let DST_SEL_W = 7; // Masked
138 let DST_SEL_Y = 7; // Masked
139 let DST_SEL_Z = 7; // Masked
140 let DST_SEL_W = 7; // Masked
H A DEvergreenInstructions.td190 let DST_SEL_Y = 7; // Masked
191 let DST_SEL_Z = 7; // Masked
192 let DST_SEL_W = 7; // Masked
201 let DST_SEL_Y = 7; // Masked
202 let DST_SEL_Z = 7; // Masked
203 let DST_SEL_W = 7; // Masked
214 let DST_SEL_Y = 7; // Masked
215 let DST_SEL_Z = 7; // Masked
216 let DST_SEL_W = 7; // Masked
/netbsd/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/
H A DInstCombineShifts.cpp191 Value *Masked, *ShiftShAmt; in dropRedundantMaskingOfLeftShiftInput() local
193 m_Shift(m_Value(Masked), m_ZExtOrSelf(m_Value(ShiftShAmt)))); in dropRedundantMaskingOfLeftShiftInput()
198 if (match(Masked, m_CombineAnd(m_Trunc(m_Value(Masked)), m_Value(Trunc))) && in dropRedundantMaskingOfLeftShiftInput()
203 Type *WidestTy = Masked->getType(); in dropRedundantMaskingOfLeftShiftInput()
225 if (match(Masked, m_c_And(m_CombineOr(MaskA, MaskB), m_Value(X)))) { in dropRedundantMaskingOfLeftShiftInput()
230 if (!canTryToConstantAddTwoShiftAmounts(OuterShift, ShiftShAmt, Masked, in dropRedundantMaskingOfLeftShiftInput()
255 } else if (match(Masked, m_c_And(m_CombineOr(MaskC, MaskD), m_Value(X))) || in dropRedundantMaskingOfLeftShiftInput()
256 match(Masked, m_Shr(m_Shl(m_Value(X), m_Value(MaskShAmt)), in dropRedundantMaskingOfLeftShiftInput()
262 if (!canTryToConstantAddTwoShiftAmounts(OuterShift, ShiftShAmt, Masked, in dropRedundantMaskingOfLeftShiftInput()
303 if (!Masked->hasOneUse()) in dropRedundantMaskingOfLeftShiftInput()
[all …]
H A DInstCombineAndOrXor.cpp828 Value *Masked = Builder.CreateAnd(L1, Mask); in foldAndOrOfICmpsOfAndWithPow2() local
830 return Builder.CreateICmp(NewPred, Masked, Mask); in foldAndOrOfICmpsOfAndWithPow2()
H A DInstCombineCompares.cpp1319 Value *Masked = Builder.CreateAnd(X, Mask); in foldIRemByPowerOfTwoToBitTest() local
1320 return ICmpInst::Create(Instruction::ICmp, Pred, Masked, Zero); in foldIRemByPowerOfTwoToBitTest()
/netbsd/external/apache2/llvm/dist/llvm/lib/Support/
H A DAPFixedPoint.cpp38 APInt Masked(NewVal & Mask); in convert() local
41 if (!(Masked == Mask || Masked == 0)) { in convert()
/netbsd/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DTypePromotion.cpp668 Value *Masked = Builder.CreateAnd(Trunc->getOperand(0), Mask); in ConvertTruncs() local
670 if (auto *I = dyn_cast<Instruction>(Masked)) in ConvertTruncs()
673 ReplaceAllUsersOfWith(Trunc, Masked); in ConvertTruncs()
/netbsd/external/apache2/llvm/dist/llvm/lib/Transforms/Instrumentation/
H A DMemProfiler.cpp427 if (auto *Masked = dyn_cast<ConstantInt>(Vector->getOperand(Idx))) { in instrumentMaskedLoadOrStore() local
428 if (Masked->isZero()) in instrumentMaskedLoadOrStore()
H A DAddressSanitizer.cpp1571 if (auto *Masked = dyn_cast<ConstantInt>(Vector->getOperand(Idx))) { in instrumentMaskedLoadOrStore() local
1572 if (Masked->isZero()) in instrumentMaskedLoadOrStore()
/netbsd/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86InstCombineIntrinsic.cpp1006 Value *Masked = IC.Builder.CreateAnd(Input, II.getArgOperand(1)); in instCombineIntrinsic() local
1007 Value *Shifted = IC.Builder.CreateLShr(Masked, in instCombineIntrinsic()
1054 Value *Masked = IC.Builder.CreateAnd(Shifted, II.getArgOperand(1)); in instCombineIntrinsic() local
1055 return IC.replaceInstUsesWith(II, Masked); in instCombineIntrinsic()
H A DX86InstrFragmentsSIMD.td704 // Masked versions of above
1076 // Masked store fragments.
H A DX86ISelDAGToDAG.cpp4309 bool FoldedBCast, bool Masked) { in getVPTESTMOpc() argument
4312 if (Masked) \ in getVPTESTMOpc()
/netbsd/external/apache2/llvm/dist/llvm/include/llvm/IR/
H A DIntrinsicsHexagon.td384 // Masked vector stores
H A DIntrinsics.td1439 //===-------------------------- Masked Intrinsics -------------------------===//
/netbsd/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMTargetTransformInfo.cpp433 if (CCH == TTI::CastContextHint::Masked && DstTy.getSizeInBits() > 128) in getCastInstrCost()
439 CCH == TTI::CastContextHint::Masked) { in getCastInstrCost()
/netbsd/external/apache2/llvm/dist/llvm/lib/Analysis/
H A DTargetTransformInfo.cpp745 return TTI::CastContextHint::Masked; in getCastContextHint()
/netbsd/external/apache2/llvm/dist/llvm/include/llvm/Analysis/
H A DTargetTransformInfo.h1087 Masked, ///< The cast is used with a masked load/store. enumerator
/netbsd/external/gpl3/gcc.old/dist/gcc/config/gcn/
H A Dgcn-valu.md2899 /* Masked lanes are required to hold zero. */
2937 /* Masked lanes are required to hold zero. */
/netbsd/external/gpl3/gcc/dist/gcc/
H A Dtree.def1223 Operand 0: OMP_SCOPE_BODY: Masked section body.
1233 Operand 0: OMP_MASKED_BODY: Masked section body.
/netbsd/external/gpl3/gcc/dist/gcc/config/gcn/
H A Dgcn-valu.md2931 /* Masked lanes are required to hold zero. */
2969 /* Masked lanes are required to hold zero. */
/netbsd/external/apache2/llvm/dist/clang/lib/CodeGen/
H A DCGOpenMPRuntime.cpp11325 llvm::SmallVector<char, 2> Masked; in emitX86DeclareSimdFunction() local
11328 Masked.push_back('N'); in emitX86DeclareSimdFunction()
11329 Masked.push_back('M'); in emitX86DeclareSimdFunction()
11332 Masked.push_back('N'); in emitX86DeclareSimdFunction()
11335 Masked.push_back('M'); in emitX86DeclareSimdFunction()
11338 for (char Mask : Masked) { in emitX86DeclareSimdFunction()
/netbsd/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp5932 SDValue Masked = DAG.getNode(ISD::AND, DL, VT, N, IntMax); in prepareSREMEqFold() local
5933 Created.push_back(Masked.getNode()); in prepareSREMEqFold()
5934 SDValue MaskedIsZero = DAG.getSetCC(DL, SETCCVT, Masked, Zero, Cond); in prepareSREMEqFold()
/netbsd/external/historical/nawk/dist/testdir/
H A Dfunstack.ok1896 S. L. Watkins ACM Algorithm 483: Masked
3564 Robert Feinstein Remark on ``Algorithm 483: Masked

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