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Searched refs:UseI (Results 1 – 18 of 18) sorted by relevance

/netbsd/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64StackTaggingPreRA.cpp182 MachineInstr *UseI = &*(UI++); in uncheckUsesOf() local
183 if (isUncheckedLoadOrStoreOpcode(UseI->getOpcode())) { in uncheckUsesOf()
186 if (UseI->getOperand(OpIdx).isReg() && in uncheckUsesOf()
187 UseI->getOperand(OpIdx).getReg() == TaggedReg) { in uncheckUsesOf()
188 UseI->getOperand(OpIdx).ChangeToFrameIndex(FI); in uncheckUsesOf()
191 } else if (UseI->isCopy() && in uncheckUsesOf()
193 uncheckUsesOf(UseI->getOperand(0).getReg(), FI); in uncheckUsesOf()
282 for (auto &UseI : MRI->use_instructions(UseReg)) { in findFirstSlotCandidate() local
283 unsigned Opcode = UseI.getOpcode(); in findFirstSlotCandidate()
290 if (UseI.isCopy()) { in findFirstSlotCandidate()
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/netbsd/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DMIRCanonicalizerPass.cpp240 MachineBasicBlock::iterator UseI = BBE; in rescheduleCanonically() local
244 if (DefI != BBE && UseI != BBE) in rescheduleCanonically()
253 UseI = BBI; in rescheduleCanonically()
258 if (DefI == BBE || UseI == BBE) in rescheduleCanonically()
265 UseI->dump(); in rescheduleCanonically()
270 MBB->splice(UseI, MBB, DefI); in rescheduleCanonically()
276 auto UseI = llvm::find_if(MBB->instrs(), [&](MachineInstr &MI) -> bool { in rescheduleCanonically() local
280 if (UseI == MBB->instr_end()) in rescheduleCanonically()
287 [&]() -> MachineBasicBlock::iterator { return UseI; }); in rescheduleCanonically()
H A DMachineCopyPropagation.cpp285 const MachineInstr &UseI, unsigned UseIdx);
287 const MachineInstr &UseI,
387 const MachineInstr &Copy, const MachineInstr &UseI, unsigned UseIdx) { in isBackwardPropagatableRegClassCopy() argument
391 UseI.getRegClassConstraint(UseIdx, TII, TRI)) in isBackwardPropagatableRegClassCopy()
403 const MachineInstr &UseI, in isForwardableRegClassCopy() argument
411 UseI.getRegClassConstraint(UseIdx, TII, TRI)) in isForwardableRegClassCopy()
414 if (!UseI.isCopy()) in isForwardableRegClassCopy()
434 TRI->getMinimalPhysRegClass(UseI.getOperand(0).getReg()); in isForwardableRegClassCopy()
H A DSplitKit.cpp222 SmallVectorImpl<SlotIndex>::const_iterator UseI, UseE; in calcLiveBlockInfo() local
223 UseI = UseSlots.begin(); in calcLiveBlockInfo()
238 if (UseI == UseE || *UseI >= Stop) { in calcLiveBlockInfo()
247 BI.FirstInstr = *UseI; in calcLiveBlockInfo()
249 do ++UseI; in calcLiveBlockInfo()
250 while (UseI != UseE && *UseI < Stop); in calcLiveBlockInfo()
251 BI.LastInstr = UseI[-1]; in calcLiveBlockInfo()
/netbsd/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DR600EmitClauseMarkers.cpp194 for (MachineBasicBlock::iterator UseI = Def; UseI != BBEnd; ++UseI) { in canClauseLocalKillFitInClause() local
195 AluInstCount += OccupiedDwords(*UseI); in canClauseLocalKillFitInClause()
197 if (!SubstituteKCacheBank(*UseI, KCacheBanks, false)) in canClauseLocalKillFitInClause()
212 if (UseI->readsRegister(MOI->getReg(), &TRI)) in canClauseLocalKillFitInClause()
216 if (UseI != Def && UseI->killsRegister(MOI->getReg(), &TRI)) in canClauseLocalKillFitInClause()
H A DAMDGPUSubtarget.cpp820 MachineInstr *UseI = Use->getInstr(); in adjustSchedDependency() local
835 } else if (UseI->isBundle()) { in adjustSchedDependency()
838 MachineBasicBlock::const_instr_iterator I(UseI->getIterator()); in adjustSchedDependency()
839 MachineBasicBlock::const_instr_iterator E(UseI->getParent()->instr_end()); in adjustSchedDependency()
/netbsd/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonSplitDouble.cpp253 MachineInstr *UseI = Op.getParent(); in partitionRegisters() local
254 if (isFixedInstr(UseI)) in partitionRegisters()
257 MachineOperand &MO = UseI->getOperand(i); in partitionRegisters()
437 MachineInstr *UseI = U->getParent(); in isProfitable() local
438 if (isFixedInstr(UseI)) { in isProfitable()
441 for (auto &Op : UseI->operands()) { in isProfitable()
452 if (UseI->isPHI()) { in isProfitable()
459 int32_t P = profit(UseI); in isProfitable()
547 const MachineInstr *UseI = I->getParent(); in collectIndRegsForLoop() local
548 if (UseI->getOpcode() != Hexagon::A2_addp) in collectIndRegsForLoop()
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H A DBitTracker.cpp987 for (MachineInstr &UseI : MRI.use_nodbg_instructions(Reg)) in visitUsesOf()
988 UseQ.push(&UseI); in visitUsesOf()
1106 MachineInstr &UseI = *UseQ.front(); in runUseQueue() local
1109 if (!InstrExec.count(&UseI)) in runUseQueue()
1111 if (UseI.isPHI()) in runUseQueue()
1112 visitPHI(UseI); in runUseQueue()
1113 else if (!UseI.isBranch()) in runUseQueue()
1114 visitNonBranch(UseI); in runUseQueue()
1116 visitBranchesFrom(UseI); in runUseQueue()
H A DHexagonBitSimplify.cpp976 MachineInstr *UseI = I->getParent(); in isDead() local
977 if (UseI->isDebugValue()) in isDead()
979 if (UseI->isPHI()) { in isDead()
1220 MachineInstr &UseI = *I->getParent(); in computeUsedBits() local
1221 if (UseI.isPHI() || UseI.isCopy()) { in computeUsedBits()
3127 MachineInstr *UseI = UI->getParent(); in processLoop() local
3128 if (UseI->getParent() != C.LB) { in processLoop()
3132 if (isBitShuffle(UseI, PR) || isStoreInput(UseI, PR)) in processLoop()
3181 if (UseI->getParent() == C.LB) { in processLoop()
3182 if (UseI->isPHI()) { in processLoop()
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H A DHexagonLoopIdiomRecognition.cpp1206 if (UseI->getOpcode() == Instruction::Select) { in classifyInst()
1207 Value *TV = UseI->getOperand(1), *FV = UseI->getOperand(2); in classifyInst()
1211 Early.insert(UseI); in classifyInst()
1215 Late.insert(UseI); in classifyInst()
1222 if (UseI->getNumOperands() == 0) in classifyInst()
1226 for (auto &I : UseI->operands()) { in classifyInst()
1247 Early.insert(UseI); in classifyInst()
1249 Late.insert(UseI); in classifyInst()
2357 Instruction *UseI = dyn_cast<Instruction>(K); in coverLoop() local
2358 if (!UseI) in coverLoop()
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H A DHexagonGenPredicate.cpp240 MachineInstr *UseI = I->getParent(); in processPredicateGPR() local
241 if (isConvertibleToPredForm(UseI)) in processPredicateGPR()
242 PUsers.insert(UseI); in processPredicateGPR()
/netbsd/external/apache2/llvm/dist/clang/lib/Driver/ToolChains/
H A DBareMetal.cpp75 bool UseI = (Arch == "rv32i") || (Arch == "rv32ic"); // ic => i in findRISCVMultilibs() local
80 addMultilibFlag(UseI, "march=rv32i", Flags); in findRISCVMultilibs()
/netbsd/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
H A DWebAssemblyRegStackify.cpp318 const MachineInstr *UseI = Use->getParent(); in isSafeToMove() local
320 assert(UseI->getParent() == Insert->getParent()); in isSafeToMove()
341 for (const auto &PriorUse : UseI->uses()) { in isSafeToMove()
/netbsd/external/apache2/llvm/dist/llvm/lib/Transforms/Utils/
H A DLoopRotationUtils.cpp739 for (User *UseI : IVOpnd->users()) { in shouldSpeculateInstrs()
740 auto *UserInst = cast<Instruction>(UseI); in shouldSpeculateInstrs()
H A DSimplifyIndVar.cpp1041 Instruction *UseI) { in getPostIncRangeInfo() argument
1042 DefUserPair Key(Def, UseI); in getPostIncRangeInfo()
1052 void updatePostIncRangeInfo(Value *Def, Instruction *UseI, ConstantRange R) { in updatePostIncRangeInfo() argument
1053 DefUserPair Key(Def, UseI); in updatePostIncRangeInfo()
/netbsd/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86CmovConversion.cpp323 [&](MachineInstr &UseI) { in collectCmovCandidates() argument
324 return UseI.getOpcode() == X86::SUBREG_TO_REG; in collectCmovCandidates()
/netbsd/external/apache2/llvm/dist/llvm/lib/Analysis/
H A DLazyValueInfo.cpp1909 if (auto *UseI = dyn_cast<Instruction>(U)) in emitInstructionAnnot() local
1910 if (!isa<PHINode>(UseI) || DT.dominates(ParentBB, UseI->getParent())) in emitInstructionAnnot()
1911 printResult(UseI->getParent()); in emitInstructionAnnot()
/netbsd/external/apache2/llvm/dist/llvm/lib/Transforms/Scalar/
H A DLoopStrengthReduce.cpp3124 auto UseI = find(Inc.UserInst->operands(), Inc.IVOperand); in FinalizeChain() local
3125 assert(UseI != Inc.UserInst->op_end() && "cannot find IV operand"); in FinalizeChain()
3126 IVIncSet.insert(UseI); in FinalizeChain()
3261 User::op_iterator UseI = in CollectFixupsAndInitialFormulae() local
3263 assert(UseI != UserInst->op_end() && "cannot find IV operand"); in CollectFixupsAndInitialFormulae()
3264 if (IVIncSet.count(UseI)) { in CollectFixupsAndInitialFormulae()
3265 LLVM_DEBUG(dbgs() << "Use is in profitable chain: " << **UseI << '\n'); in CollectFixupsAndInitialFormulae()