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Searched refs:getImm (Results 1 – 25 of 378) sorted by relevance

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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DR600ClauseMergePass.cpp79 .getImm(); in getCFAluSize()
86 .getImm(); in isCFAluEnabled()
127 if (LatrCFAlu.getOperand(Mode0Idx).getImm() && in mergeIfPossible()
128 RootCFAlu.getOperand(Mode0Idx).getImm() && in mergeIfPossible()
129 (LatrCFAlu.getOperand(KBank0Idx).getImm() != in mergeIfPossible()
143 if (LatrCFAlu.getOperand(Mode1Idx).getImm() && in mergeIfPossible()
144 RootCFAlu.getOperand(Mode1Idx).getImm() && in mergeIfPossible()
152 if (LatrCFAlu.getOperand(Mode0Idx).getImm()) { in mergeIfPossible()
154 LatrCFAlu.getOperand(Mode0Idx).getImm()); in mergeIfPossible()
160 if (LatrCFAlu.getOperand(Mode1Idx).getImm()) { in mergeIfPossible()
[all …]
H A DGCNDPPCombine.cpp231 DPPInst.addImm(Mod0->getImm()); in createDPPInst()
254 DPPInst.addImm(Mod1->getImm()); in createDPPInst()
313 if (OldOpnd->getImm() == 0) in isIdentityValue()
320 if (static_cast<uint32_t>(OldOpnd->getImm()) == in isIdentityValue()
326 if (static_cast<int32_t>(OldOpnd->getImm()) == in isIdentityValue()
332 if (static_cast<int32_t>(OldOpnd->getImm()) == in isIdentityValue()
340 if (OldOpnd->getImm() == 1) in isIdentityValue()
381 return (Imm->getImm() & Mask) == Value; in hasNoImmOrEqual()
418 BankMaskOpnd->getImm() == 0xF; in combineDPPMov()
422 bool BoundCtrlZero = BCZOpnd->getImm(); in combineDPPMov()
[all …]
/netbsd/external/apache2/llvm/dist/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMInstPrinter.cpp583 unsigned Imm = MO.getImm(); in printPostIdxImm8Operand()
594 O << (MO2.getImm() ? "" : "-"); in printPostIdxRegOperand()
602 unsigned Imm = MO.getImm(); in printPostIdxImm8s4Operand()
634 int64_t Imm = MO2.getImm(); in printMveAddrModeQOperand()
709 if (MO2.getImm()) { in printAddrMode6Operand()
710 O << ":" << (MO2.getImm() << 3); in printAddrMode6Operand()
742 uint32_t v = ~MO.getImm(); in printBitfieldInvMaskImmOperand()
839 if (Op.getImm()) in printSetendOperand()
854 unsigned IFlags = Op.getImm(); in printCPSIFlag()
1267 if (MO2.getImm()) { in printT2AddrModeImm0_1020s4Operand()
[all …]
H A DARMMCCodeEmitter.cpp329 return MO.getImm(); in getModImmOpValue()
762 return MO.getImm() >> 2; in getARMBranchTargetOpValue()
777 return MO.getImm() >> 2; in getARMBLTargetOpValue()
918 return MO.getImm(); in getThumbAdrLabelOpValue()
1603 Value |= MO3.getImm(); in getT2AddrModeSORegOpValue()
1765 switch (Imm.getImm()) { in getAddrMode6AddressOpValue()
1789 switch (Imm.getImm()) { in getAddrMode6OneLane32AddressOpValue()
1816 switch (Imm.getImm()) { in getAddrMode6DupAddressOpValue()
1899 return isNeg ? -(MO.getImm() >> 1) : (MO.getImm() >> 1); in getBFTargetOpValue()
1919 int Diff = MO.getImm() - BranchMO.getImm(); in getBFAfterTargetOpValue()
[all …]
H A DARMMCTargetDesc.cpp42 (MI.getOperand(0).isImm() && MI.getOperand(0).getImm() == 15) && in getMCRDeprecationInfo()
43 (MI.getOperand(1).isImm() && MI.getOperand(1).getImm() == 0) && in getMCRDeprecationInfo()
46 (MI.getOperand(3).isImm() && MI.getOperand(3).getImm() == 7)) { in getMCRDeprecationInfo()
47 if ((MI.getOperand(5).isImm() && MI.getOperand(5).getImm() == 4)) { in getMCRDeprecationInfo()
48 if (MI.getOperand(4).isImm() && MI.getOperand(4).getImm() == 5) { in getMCRDeprecationInfo()
55 if (MI.getOperand(4).isImm() && MI.getOperand(4).getImm() == 10) { in getMCRDeprecationInfo()
62 if (MI.getOperand(4).isImm() && MI.getOperand(4).getImm() == 10 && in getMCRDeprecationInfo()
63 (MI.getOperand(5).isImm() && MI.getOperand(5).getImm() == 5)) { in getMCRDeprecationInfo()
69 ((MI.getOperand(0).isImm() && MI.getOperand(0).getImm() == 10) || in getMCRDeprecationInfo()
93 MI.getOperand(1).getImm() != 8) { in getITDeprecationInfo()
[all …]
/netbsd/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
H A DSystemZAsmPrinter.cpp37 .addImm(MI->getOperand(1).getImm()); in lowerRILow()
42 .addImm(MI->getOperand(2).getImm()); in lowerRILow()
51 .addImm(MI->getOperand(1).getImm()); in lowerRIHigh()
56 .addImm(MI->getOperand(2).getImm()); in lowerRIHigh()
66 .addImm(MI->getOperand(3).getImm()) in lowerRIEfLow()
67 .addImm(MI->getOperand(4).getImm()) in lowerRIEfLow()
68 .addImm(MI->getOperand(5).getImm()); in lowerRIEfLow()
112 .addImm(MI->getOperand(2).getImm()) in lowerSubvectorLoad()
122 .addImm(MI->getOperand(2).getImm()) in lowerSubvectorStore()
142 .addImm(MI->getOperand(0).getImm()) in emitInstruction()
[all …]
H A DSystemZInstrInfo.cpp124 OffsetMO.getImm()); in splitAdjDynAlloc()
180 MI.getOperand(2).getImm()); in expandRXYPseudo()
337 MI.getOperand(4).getImm() != 0) in isStackSlotCopy()
473 Cond[1].setImm(Cond[1].getImm() ^ Cond[0].getImm()); in reverseBranchCondition()
502 unsigned CCValid = Cond[0].getImm(); in insertBranch()
503 unsigned CCMask = Cond[1].getImm(); in insertBranch()
525 Value = MI.getOperand(1).getImm(); in analyzeCompare()
577 unsigned CCValid = Pred[0].getImm(); in insertSelect()
578 unsigned CCMask = Pred[1].getImm(); in insertSelect()
722 unsigned CCValid = Pred[0].getImm(); in PredicateInstruction()
[all …]
/netbsd/external/apache2/llvm/dist/llvm/lib/Target/VE/MCTargetDesc/
H A DVEInstPrinter.cpp90 MI->getOperand(OpNum + 2).getImm() == 0) { in printMemASXOperand()
96 MI->getOperand(OpNum + 1).getImm() == 0 && in printMemASXOperand()
99 MI->getOperand(OpNum + 2).getImm() == 0) { in printMemASXOperand()
107 MI->getOperand(OpNum + 1).getImm() == 0) { in printMemASXOperand()
134 MI->getOperand(OpNum + 1).getImm() == 0) { in printMemASOperandASX()
141 MI->getOperand(OpNum + 1).getImm() == 0) { in printMemASOperandASX()
165 MI->getOperand(OpNum + 1).getImm() == 0) { in printMemASOperandRRM()
172 MI->getOperand(OpNum + 1).getImm() == 0) { in printMemASOperandRRM()
196 MI->getOperand(OpNum + 1).getImm() == 0) { in printMemASOperandHM()
219 int CC = (int)MI->getOperand(OpNum).getImm(); in printCCOperand()
[all …]
/netbsd/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DAMDGPUInstPrinter.cpp103 if (MI->getOperand(OpNo).getImm()) { in printNamedBit()
125 if (MI->getOperand(OpNo).getImm()) { in printMBUFOffset()
167 if (MI->getOperand(OpNo).getImm()) { in printOffset0()
176 if (MI->getOperand(OpNo).getImm()) { in printOffset1()
231 if (MI->getOperand(OpNo).getImm()) { in printDMask()
660 O << formatDec(Op.getImm()); in printOperand()
1214 if (Op.getImm() == 1) { in printIfSet()
1225 if (Op.getImm() == 1) in printIfSet()
1534 int64_t Imm = Op.getImm(); in printLiteral()
1589 O << Op.getImm(); in printOperand()
[all …]
H A DR600MCCodeEmitter.cpp107 uint32_t InstWord2 = MI.getOperand(2).getImm(); // Offset in encodeInstruction()
116 int64_t Sampler = MI.getOperand(14).getImm(); in encodeInstruction()
119 MI.getOperand(2).getImm(), in encodeInstruction()
120 MI.getOperand(3).getImm(), in encodeInstruction()
121 MI.getOperand(4).getImm(), in encodeInstruction()
122 MI.getOperand(5).getImm() in encodeInstruction()
125 MI.getOperand(6).getImm() & 0x1F, in encodeInstruction()
126 MI.getOperand(7).getImm() & 0x1F, in encodeInstruction()
127 MI.getOperand(8).getImm() & 0x1F in encodeInstruction()
187 return MO.getImm(); in getMachineOpValue()
/netbsd/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/AsmParser/
H A DPPCAsmParser.cpp245 int64_t getImm() const { in getImm() function
367 return (Kind == Immediate && getImm() <= -8 && getImm() >= -512 && in isHashImmX8()
368 (getImm() & 7) == 0); in isHashImmX8()
376 (Kind == Immediate && isInt<34>(getImm()) && (getImm() & 15) == 0); in isS34ImmX16()
402 if ((getImm() & 3) != 0) in isDirectBr()
404 if (isInt<26>(getImm())) in isDirectBr()
408 if (isUInt<32>(getImm()) && isInt<26>(static_cast<int32_t>(getImm()))) in isDirectBr()
422 return Kind == Immediate && isUInt<6>(getImm()) && ((getImm() & 1) == 0); in isVSRpEvenRegNumber()
711 OS << getImm(); in print()
854 int64_t N = Inst.getOperand(2).getImm(); in ProcessInstruction()
[all …]
/netbsd/external/apache2/llvm/dist/llvm/lib/Target/Lanai/MCTargetDesc/
H A DLanaiMCCodeEmitter.cpp138 unsigned AluCode = AluOp.getImm(); in adjustPqBits()
201 assert(isInt<16>(Op2.getImm()) && in getRiMemoryOpValue()
204 Encoding |= (Op2.getImm() & 0xffff); in getRiMemoryOpValue()
205 if (Op2.getImm() != 0) { in getRiMemoryOpValue()
206 if (LPAC::isPreOp(AluOp.getImm())) in getRiMemoryOpValue()
208 if (LPAC::isPostOp(AluOp.getImm())) in getRiMemoryOpValue()
232 unsigned AluOp = AluMCOp.getImm(); in getRrMemoryOpValue()
272 assert(isInt<10>(Op2.getImm()) && in getSplsOpValue()
275 Encoding |= (Op2.getImm() & 0x3ff); in getSplsOpValue()
276 if (Op2.getImm() != 0) { in getSplsOpValue()
[all …]
H A DLanaiInstPrinter.cpp49 unsigned AluCode = MI->getOperand(3).getImm(); in usesGivenOffset()
56 unsigned AluCode = MI->getOperand(3).getImm(); in isPreIncrementForm()
61 unsigned AluCode = MI->getOperand(3).getImm(); in isPostIncrementForm()
66 if (MI->getOperand(2).getImm() < 0) in decIncOperator()
156 OS << formatHex(Op.getImm()); in printOperand()
181 OS << formatHex(Op.getImm() << 16); in printHi16ImmOperand()
205 OS << formatHex(0xffff0000 | Op.getImm()); in printLo16AndImmOperand()
232 OS << OffsetOp.getImm(); in printMemoryImmediateOffset()
243 const unsigned AluCode = AluOp.getImm(); in printMemRiOperand()
258 const unsigned AluCode = AluOp.getImm(); in printMemRrOperand()
[all …]
/netbsd/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/MCTargetDesc/
H A DPPCInstPrinter.cpp115 unsigned char SH = MI->getOperand(2).getImm(); in printInst()
116 unsigned char MB = MI->getOperand(3).getImm(); in printInst()
117 unsigned char ME = MI->getOperand(4).getImm(); in printInst()
139 unsigned char SH = MI->getOperand(2).getImm(); in printInst()
186 unsigned char L = MI->getOperand(0).getImm(); in printInst()
219 unsigned Code = MI->getOperand(OpNo).getImm(); in printPredicateOperand()
316 unsigned Code = MI->getOperand(OpNo).getImm(); in printATBitsAsHint()
358 int Value = MI->getOperand(OpNo).getImm(); in printS5ImmOperand()
425 O << (short)MI->getOperand(OpNo).getImm(); in printS16ImmOperand()
520 O << MI->getOperand(OpNo).getImm(); in printMemRegImmHash()
[all …]
/netbsd/external/apache2/llvm/dist/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64MCCodeEmitter.cpp240 return MO.getImm(); in getAdrLabelOpValue()
302 return MO.getImm(); in getCondBranchTargetOpValue()
324 return MO.getImm(); in getLoadLiteralOpValue()
352 return MO.getImm(); in getMoveWideImmOpValue()
372 return MO.getImm(); in getTestBranchTargetOpValue()
394 return MO.getImm(); in getBranchTargetOpValue()
421 switch (MO.getImm()) { in getVecShifterOpValue()
444 return 64 - MO.getImm(); in getFixedPointScaleOpValue()
480 return 8 - MO.getImm(); in getVecShiftR8OpValue()
516 return MO.getImm() - 8; in getVecShiftL8OpValue()
[all …]
H A DAArch64InstPrinter.cpp85 switch (Op3.getImm()) { in printInst()
121 int64_t immr = Op2.getImm(); in printInst()
122 int64_t imms = Op3.getImm(); in printInst()
152 if (Op2.getImm() > Op3.getImm()) { in printInst()
155 << ", #" << (Is64Bit ? 64 : 32) - Op2.getImm() << ", #" << Op3.getImm() + 1; in printInst()
163 << ", #" << Op2.getImm() << ", #" << Op3.getImm() - Op2.getImm() + 1; in printInst()
775 unsigned Op1Val = Op1.getImm(); in printSysAlias()
776 unsigned CnVal = Cn.getImm(); in printSysAlias()
777 unsigned CmVal = Cm.getImm(); in printSysAlias()
778 unsigned Op2Val = Op2.getImm(); in printSysAlias()
[all …]
/netbsd/external/apache2/llvm/dist/llvm/lib/Target/Lanai/AsmParser/
H A DLanaiAsmParser.cpp161 const MCExpr *getImm() const { in getImm() function
409 addExpr(Inst, getImm()); in addImmOperands()
414 addExpr(Inst, getImm()); in addBrTargetOperands()
419 addExpr(Inst, getImm()); in addCallTargetOperands()
424 addExpr(Inst, getImm()); in addCondCodeOperands()
458 addExpr(Inst, getImm()); in addImmShiftOperands()
463 addExpr(Inst, getImm()); in addImm10Operands()
471 else if (isa<LanaiMCExpr>(getImm())) { in addLoImm16Operands()
563 OS << "Imm: " << getImm() << "\n"; in print()
614 const MCExpr *Imm = Op->getImm(); in MorphToMemImm()
[all …]
/netbsd/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/MCTargetDesc/
H A DWebAssemblyMCCodeEmitter.cpp100 encodeSLEB128(int32_t(MO.getImm()), OS); in encodeInstruction()
103 encodeULEB128(uint32_t(MO.getImm()), OS); in encodeInstruction()
106 encodeSLEB128(int64_t(MO.getImm()), OS); in encodeInstruction()
110 OS << uint8_t(MO.getImm()); in encodeInstruction()
113 support::endian::write<uint8_t>(OS, MO.getImm(), support::little); in encodeInstruction()
116 support::endian::write<uint16_t>(OS, MO.getImm(), support::little); in encodeInstruction()
119 support::endian::write<uint32_t>(OS, MO.getImm(), support::little); in encodeInstruction()
122 support::endian::write<uint64_t>(OS, MO.getImm(), support::little); in encodeInstruction()
127 encodeULEB128(uint64_t(MO.getImm()), OS); in encodeInstruction()
130 encodeULEB128(uint64_t(MO.getImm()), OS); in encodeInstruction()
/netbsd/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DStackMaps.h47 uint64_t getID() const { return MI->getOperand(IDPos).getImm(); } in getID()
51 return MI->getOperand(NBytesPos).getImm(); in getNumPatchBytes()
101 uint64_t getID() const { return getMetaOper(IDPos).getImm(); } in getID()
105 return getMetaOper(NBytesPos).getImm(); in getNumPatchBytes()
115 return getMetaOper(CCPos).getImm(); in getCallingConv()
122 return MI->getOperand(getMetaIdx(NArgPos)).getImm(); in getNumCallArgs()
204 uint64_t getID() const { return MI->getOperand(NumDefs + IDPos).getImm(); } in getID()
208 return MI->getOperand(NumDefs + NBytesPos).getImm(); in getNumPatchBytes()
218 return MI->getOperand(getCCIdx()).getImm(); in getCallingConv()
222 uint64_t getFlags() const { return MI->getOperand(getFlagsIdx()).getImm(); } in getFlags()
[all …]
/netbsd/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64AsmPrinter.cpp632 O << MO.getImm(); in printOperand()
701 if (MO.isImm() && MO.getImm() == 0) { in PrintAsmOperand()
1206 MI->getOperand(1).getImm() == 0) { in emitInstruction()
1395 assert(MI->getOperand(0).getImm() < 0 && in emitInstruction()
1406 assert(MI->getOperand(1).getImm() < 0 && in emitInstruction()
1413 if (MI->getOperand(1).getImm() == 30 && MI->getOperand(0).getImm() >= 19 && in emitInstruction()
1414 MI->getOperand(0).getImm() <= 28) { in emitInstruction()
1421 assert((MI->getOperand(1).getImm() - MI->getOperand(0).getImm() == 1) && in emitInstruction()
1428 assert((MI->getOperand(1).getImm() - MI->getOperand(0).getImm() == 1) && in emitInstruction()
1449 assert((MI->getOperand(1).getImm() - MI->getOperand(0).getImm() == 1) && in emitInstruction()
[all …]
/netbsd/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DPseudoProbeInserter.cpp120 return std::hash<uint64_t>()(MI->getOperand(0).getImm()) ^ in runOnMachineFunction()
121 std::hash<uint64_t>()(MI->getOperand(1).getImm()); in runOnMachineFunction()
125 return Left->getOperand(0).getImm() == Right->getOperand(0).getImm() && in runOnMachineFunction()
126 Left->getOperand(1).getImm() == Right->getOperand(1).getImm() && in runOnMachineFunction()
127 Left->getOperand(3).getImm() == Right->getOperand(3).getImm() && in runOnMachineFunction()
/netbsd/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/MCTargetDesc/
H A DSystemZInstPrinter.cpp52 O << MO.getImm(); in printOperand()
79 int64_t Value = MI->getOperand(OpNum).getImm(); in printUImmOperand()
86 int64_t Value = MI->getOperand(OpNum).getImm(); in printSImmOperand()
161 O.write_hex(MO.getImm()); in printPCRelOperand()
198 MI->getOperand(OpNum + 1).getImm(), 0, O); in printBDAddrOperand()
204 MI->getOperand(OpNum + 1).getImm(), in printBDXAddrOperand()
211 uint64_t Disp = MI->getOperand(OpNum + 1).getImm(); in printBDLAddrOperand()
212 uint64_t Length = MI->getOperand(OpNum + 2).getImm(); in printBDLAddrOperand()
224 uint64_t Disp = MI->getOperand(OpNum + 1).getImm(); in printBDRAddrOperand()
238 MI->getOperand(OpNum + 1).getImm(), in printBDVAddrOperand()
[all …]
/netbsd/external/apache2/llvm/dist/llvm/lib/Target/Lanai/
H A DLanaiMemAluCombiner.cpp178 return Op1.getImm() == Op2.getImm(); in isSameOperand()
186 (Op.isImm() && Op.getImm() == 0)); in isZeroOperand()
267 InstrBuilder.addImm(AluOffset.getImm()); in insertMergedInstruction()
311 ((Offset.getImm() == 0 && in isSuitableAluInstr()
314 ((IsSpls && isInt<10>(Op2.getImm())) || in isSuitableAluInstr()
315 (!IsSpls && isInt<16>(Op2.getImm())))) || in isSuitableAluInstr()
316 Offset.getImm() == Op2.getImm())) in isSuitableAluInstr()
376 LPAC::AluCode AluOpcode = static_cast<LPAC::AluCode>(AluOperand.getImm()); in combineMemAluInBasicBlock()
/netbsd/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonCopyToCombine.cpp663 int64_t V = HiOperand.getImm(); in emitConst64()
686 .addImm(HiOperand.getImm()) in emitCombineII()
702 .addImm(HiOperand.getImm()) in emitCombineII()
717 .addImm(HiOperand.getImm()) in emitCombineII()
732 .addImm(HiOperand.getImm()) in emitCombineII()
743 .addImm(HiOperand.getImm()) in emitCombineII()
751 .addImm(HiOperand.getImm()) in emitCombineII()
759 .addImm(HiOperand.getImm()) in emitCombineII()
760 .addImm(LoOperand.getImm()); in emitCombineII()
807 .addImm(HiOperand.getImm()) in emitCombineIR()
[all …]
/netbsd/external/apache2/llvm/dist/llvm/lib/Target/RISCV/MCTargetDesc/
H A DRISCVInstPrinter.cpp97 O << MO.getImm(); in printOperand()
114 uint64_t Target = Address + MO.getImm(); in printBranchOperand()
119 O << MO.getImm(); in printBranchOperand()
126 unsigned Imm = MI->getOperand(OpNo).getImm(); in printCSRSystemRegister()
137 unsigned FenceArg = MI->getOperand(OpNo).getImm(); in printFenceArg()
155 static_cast<RISCVFPRndMode::RoundingMode>(MI->getOperand(OpNo).getImm()); in printFRMArg()
172 unsigned Imm = MI->getOperand(OpNo).getImm(); in printVTypeI()

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