/netbsd/sys/external/bsd/drm2/dist/drm/radeon/ |
H A D | radeon_cypress_dpm.c | 962 cpu_to_be16(eg_pi->mc_reg_table.mc_reg_address[j].s0); in cypress_populate_mc_reg_addresses() 964 cpu_to_be16(eg_pi->mc_reg_table.mc_reg_address[j].s1); in cypress_populate_mc_reg_addresses() 1010 eg_pi->mc_reg_table.mc_reg_address[i].s1 = MC_PMG_CMD_EMRS >> 2; in cypress_set_mc_reg_address_table() 1014 eg_pi->mc_reg_table.mc_reg_address[i].s1 = MC_PMG_CMD_MRS >> 2; in cypress_set_mc_reg_address_table() 1021 eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_MISC1 >> 2; in cypress_set_mc_reg_address_table() 1022 eg_pi->mc_reg_table.mc_reg_address[i].s1 = MC_SEQ_MISC1 >> 2; in cypress_set_mc_reg_address_table() 1029 eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_MISC3 >> 2; in cypress_set_mc_reg_address_table() 1030 eg_pi->mc_reg_table.mc_reg_address[i].s1 = MC_SEQ_MISC3 >> 2; in cypress_set_mc_reg_address_table() 1044 RREG32(eg_pi->mc_reg_table.mc_reg_address[i].s1 << 2); in cypress_retrieve_ac_timing_for_one_entry() 1178 value = RREG32(eg_pi->mc_reg_table.mc_reg_address[i].s1 << 2); in cypress_copy_ac_timing_from_s1_to_s0() [all …]
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H A D | radeon_btc_dpm.c | 1929 switch (table->mc_reg_address[i].s1) { in btc_set_mc_special_registers() 1932 table->mc_reg_address[j].s1 = MC_PMG_CMD_EMRS >> 2; in btc_set_mc_special_registers() 1933 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_EMRS_LP >> 2; in btc_set_mc_special_registers() 1945 table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS >> 2; in btc_set_mc_special_registers() 1946 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS_LP >> 2; in btc_set_mc_special_registers() 1961 table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS1 >> 2; in btc_set_mc_special_registers() 1962 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS1_LP >> 2; in btc_set_mc_special_registers() 1989 table->mc_reg_address[i].s0 = in btc_set_s0_mc_reg_index() 1990 btc_check_s0_mc_reg_index(table->mc_reg_address[i].s1, &address) ? in btc_set_s0_mc_reg_index() 1991 address : table->mc_reg_address[i].s1; in btc_set_s0_mc_reg_index() [all …]
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H A D | cypress_dpm.h | 41 SMC_Evergreen_MCRegisterAddress mc_reg_address[SMC_EVERGREEN_MC_REGISTER_ARRAY_SIZE]; member
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H A D | si_dpm.h | 119 SMC_NIslands_MCRegisterAddress mc_reg_address[SMC_SISLANDS_MC_REGISTER_ARRAY_SIZE]; member
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H A D | radeon_ni_dpm.c | 2721 switch (table->mc_reg_address[i].s1) { in ni_set_mc_special_registers() 2726 table->mc_reg_address[j].s1 = MC_PMG_CMD_EMRS >> 2; in ni_set_mc_special_registers() 2727 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_EMRS_LP >> 2; in ni_set_mc_special_registers() 2737 table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS >> 2; in ni_set_mc_special_registers() 2738 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS_LP >> 2; in ni_set_mc_special_registers() 2752 table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS1 >> 2; in ni_set_mc_special_registers() 2844 table->mc_reg_address[i].s0 = in ni_set_s0_mc_reg_index() 2846 address : table->mc_reg_address[i].s1; in ni_set_s0_mc_reg_index() 2860 ni_table->mc_reg_address[i].s1 = table->mc_reg_address[i].s1; in ni_copy_vbios_mc_reg_table() 2937 cpu_to_be16(ni_pi->mc_reg_table.mc_reg_address[j].s0); in ni_populate_mc_reg_addresses() [all …]
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H A D | ni_dpm.h | 59 SMC_NIslands_MCRegisterAddress mc_reg_address[SMC_NISLANDS_MC_REGISTER_ARRAY_SIZE]; member
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H A D | radeon_ci_dpm.c | 4352 switch(table->mc_reg_address[i].s1 << 2) { in ci_set_mc_special_registers() 4355 table->mc_reg_address[j].s1 = MC_PMG_CMD_EMRS >> 2; in ci_set_mc_special_registers() 4366 table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS >> 2; in ci_set_mc_special_registers() 4367 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS_LP >> 2; in ci_set_mc_special_registers() 4379 table->mc_reg_address[j].s1 = MC_PMG_AUTO_CMD >> 2; in ci_set_mc_special_registers() 4380 table->mc_reg_address[j].s0 = MC_PMG_AUTO_CMD >> 2; in ci_set_mc_special_registers() 4392 table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS1 >> 2; in ci_set_mc_special_registers() 4507 table->mc_reg_address[i].s0 = in ci_set_s0_mc_reg_index() 4509 address : table->mc_reg_address[i].s1; in ci_set_s0_mc_reg_index() 4524 ci_table->mc_reg_address[i].s1 = table->mc_reg_address[i].s1; in ci_copy_vbios_mc_reg_table() [all …]
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H A D | radeon_si_dpm.c | 5369 switch (table->mc_reg_address[i].s1 << 2) { in si_set_mc_special_registers() 5372 table->mc_reg_address[j].s1 = MC_PMG_CMD_EMRS >> 2; in si_set_mc_special_registers() 5383 table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS >> 2; in si_set_mc_special_registers() 5397 table->mc_reg_address[j].s1 = MC_PMG_AUTO_CMD >> 2; in si_set_mc_special_registers() 5398 table->mc_reg_address[j].s0 = MC_PMG_AUTO_CMD >> 2; in si_set_mc_special_registers() 5409 table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS1 >> 2; in si_set_mc_special_registers() 5504 table->mc_reg_address[i].s0 = si_check_s0_mc_reg_index(table->mc_reg_address[i].s1, &address) ? in si_set_s0_mc_reg_index() 5505 address : table->mc_reg_address[i].s1; in si_set_s0_mc_reg_index() 5520 si_table->mc_reg_address[i].s1 = table->mc_reg_address[i].s1; in si_copy_vbios_mc_reg_table() 5597 cpu_to_be16(si_pi->mc_reg_table.mc_reg_address[j].s0); in si_populate_mc_reg_addresses() [all …]
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H A D | ci_dpm.h | 89 SMU7_Discrete_MCRegisterAddress mc_reg_address[SMU7_DISCRETE_MC_REGISTER_ARRAY_SIZE]; member
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H A D | radeon_mode.h | 669 struct atom_mc_register_address mc_reg_address[VBIOS_MC_REGISTER_ARRAY_SIZE]; member
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H A D | radeon_atombios.c | 4019 reg_table->mc_reg_address[i].s1 = in radeon_atom_init_mc_reg_table() 4021 reg_table->mc_reg_address[i].pre_reg_data = in radeon_atom_init_mc_reg_table() 4037 if ((reg_table->mc_reg_address[i].pre_reg_data & LOW_NIBBLE_MASK) == DATA_FROM_TABLE) { in radeon_atom_init_mc_reg_table() 4041 } else if ((reg_table->mc_reg_address[i].pre_reg_data & LOW_NIBBLE_MASK) == DATA_EQU_PREV) { in radeon_atom_init_mc_reg_table()
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/netbsd/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/ |
H A D | amdgpu_iceland_smumgr.c | 2478 table->mc_reg_address[i].s0 = in iceland_set_s0_mc_reg_index() 2480 ? address : table->mc_reg_address[i].s1; in iceland_set_s0_mc_reg_index() 2496 ni_table->mc_reg_address[i].s1 = table->mc_reg_address[i].s1; in iceland_copy_vbios_smc_reg_table() 2525 switch (table->mc_reg_address[i].s1) { in iceland_set_mc_special_registers() 2529 table->mc_reg_address[j].s1 = mmMC_PMG_CMD_EMRS; in iceland_set_mc_special_registers() 2530 table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_EMRS_LP; in iceland_set_mc_special_registers() 2541 table->mc_reg_address[j].s1 = mmMC_PMG_CMD_MRS; in iceland_set_mc_special_registers() 2542 table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_MRS_LP; in iceland_set_mc_special_registers() 2557 table->mc_reg_address[j].s1 = mmMC_PMG_AUTO_CMD; in iceland_set_mc_special_registers() 2558 table->mc_reg_address[j].s0 = mmMC_PMG_AUTO_CMD; in iceland_set_mc_special_registers() [all …]
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H A D | iceland_smumgr.h | 59 SMU71_Discrete_MCRegisterAddress mc_reg_address[SMU71_DISCRETE_MC_REGISTER_ARRAY_SIZE]; member
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H A D | amdgpu_ci_smumgr.c | 2549 table->mc_reg_address[i].s0 = in ci_set_s0_mc_reg_index() 2551 ? address : table->mc_reg_address[i].s1; in ci_set_s0_mc_reg_index() 2567 ni_table->mc_reg_address[i].s1 = table->mc_reg_address[i].s1; in ci_copy_vbios_smc_reg_table() 2596 switch (table->mc_reg_address[i].s1) { in ci_set_mc_special_registers() 2600 table->mc_reg_address[j].s1 = mmMC_PMG_CMD_EMRS; in ci_set_mc_special_registers() 2601 table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_EMRS_LP; in ci_set_mc_special_registers() 2612 table->mc_reg_address[j].s1 = mmMC_PMG_CMD_MRS; in ci_set_mc_special_registers() 2613 table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_MRS_LP; in ci_set_mc_special_registers() 2627 table->mc_reg_address[j].s1 = mmMC_PMG_AUTO_CMD; in ci_set_mc_special_registers() 2628 table->mc_reg_address[j].s0 = mmMC_PMG_AUTO_CMD; in ci_set_mc_special_registers() [all …]
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H A D | amdgpu_tonga_smumgr.c | 2939 table->mc_reg_address[i].s0 = in tonga_set_s0_mc_reg_index() 2943 table->mc_reg_address[i].s1; in tonga_set_s0_mc_reg_index() 2959 ni_table->mc_reg_address[i].s1 = table->mc_reg_address[i].s1; in tonga_copy_vbios_smc_reg_table() 2988 switch (table->mc_reg_address[i].s1) { in tonga_set_mc_special_registers() 2993 table->mc_reg_address[j].s1 = mmMC_PMG_CMD_EMRS; in tonga_set_mc_special_registers() 2994 table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_EMRS_LP; in tonga_set_mc_special_registers() 3005 table->mc_reg_address[j].s1 = mmMC_PMG_CMD_MRS; in tonga_set_mc_special_registers() 3006 table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_MRS_LP; in tonga_set_mc_special_registers() 3020 table->mc_reg_address[j].s1 = mmMC_PMG_AUTO_CMD; in tonga_set_mc_special_registers() 3021 table->mc_reg_address[j].s0 = mmMC_PMG_AUTO_CMD; in tonga_set_mc_special_registers() [all …]
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H A D | tonga_smumgr.h | 61 SMU72_Discrete_MCRegisterAddress mc_reg_address[SMU72_DISCRETE_MC_REGISTER_ARRAY_SIZE]; member
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H A D | ci_smumgr.h | 60 SMU7_Discrete_MCRegisterAddress mc_reg_address[SMU7_DISCRETE_MC_REGISTER_ARRAY_SIZE]; member
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/netbsd/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
H A D | si_dpm.h | 281 SMC_Evergreen_MCRegisterAddress mc_reg_address[SMC_EVERGREEN_MC_REGISTER_ARRAY_SIZE]; member 627 SMC_NIslands_MCRegisterAddress mc_reg_address[SMC_NISLANDS_MC_REGISTER_ARRAY_SIZE]; member 935 SMC_NIslands_MCRegisterAddress mc_reg_address[SMC_SISLANDS_MC_REGISTER_ARRAY_SIZE]; member
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H A D | amdgpu_atombios.h | 118 struct atom_mc_register_address mc_reg_address[VBIOS_MC_REGISTER_ARRAY_SIZE]; member
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H A D | amdgpu_si_dpm.c | 5830 switch (table->mc_reg_address[i].s1) { in si_set_mc_special_registers() 5833 table->mc_reg_address[j].s1 = MC_PMG_CMD_EMRS; in si_set_mc_special_registers() 5834 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_EMRS_LP; in si_set_mc_special_registers() 5844 table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS; in si_set_mc_special_registers() 5845 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS_LP; in si_set_mc_special_registers() 5858 table->mc_reg_address[j].s1 = MC_PMG_AUTO_CMD; in si_set_mc_special_registers() 5859 table->mc_reg_address[j].s0 = MC_PMG_AUTO_CMD; in si_set_mc_special_registers() 5868 table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS1; in si_set_mc_special_registers() 5960 table->mc_reg_address[i].s0 = si_check_s0_mc_reg_index(table->mc_reg_address[i].s1, &address) ? in si_set_s0_mc_reg_index() 5961 address : table->mc_reg_address[i].s1; in si_set_s0_mc_reg_index() [all …]
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H A D | amdgpu_atombios.c | 1613 reg_table->mc_reg_address[i].s1 = in amdgpu_atombios_init_mc_reg_table() 1615 reg_table->mc_reg_address[i].pre_reg_data = in amdgpu_atombios_init_mc_reg_table() 1631 if ((reg_table->mc_reg_address[i].pre_reg_data & LOW_NIBBLE_MASK) == DATA_FROM_TABLE) { in amdgpu_atombios_init_mc_reg_table() 1635 } else if ((reg_table->mc_reg_address[i].pre_reg_data & LOW_NIBBLE_MASK) == DATA_EQU_PREV) { in amdgpu_atombios_init_mc_reg_table()
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/netbsd/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/ |
H A D | amdgpu_ppatomctrl.c | 74 if ((table->mc_reg_address[i].uc_pre_reg_data & in atomctrl_retrieve_ac_timing() 79 } else if ((table->mc_reg_address[i].uc_pre_reg_data & in atomctrl_retrieve_ac_timing() 123 table->mc_reg_address[i].s1 = in atomctrl_set_mc_reg_address_table() 125 table->mc_reg_address[i].uc_pre_reg_data = in atomctrl_set_mc_reg_address_table()
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H A D | ppatomctrl.h | 253 pp_atomctrl_mc_register_address mc_reg_address[VBIOS_MC_REGISTER_ARRAY_SIZE]; member
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