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Searched refs:mmSDMA0_RLC0_MIDCMD_CNTL (Results 1 – 11 of 11) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_offset.h374 #define mmSDMA0_RLC0_MIDCMD_CNTL … macro
H A Dsdma0_4_0_offset.h462 #define mmSDMA0_RLC0_MIDCMD_CNTL 0x0189 macro
H A Dsdma0_4_2_offset.h458 #define mmSDMA0_RLC0_MIDCMD_CNTL … macro
H A Dsdma0_4_2_2_offset.h462 #define mmSDMA0_RLC0_MIDCMD_CNTL … macro
/netbsd/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_amdkfd_arcturus.c224 reg <= mmSDMA0_RLC0_MIDCMD_CNTL; reg++) in kgd_hqd_sdma_dump()
H A Damdgpu_amdkfd_gfx_v8.c392 for (reg = mmSDMA0_RLC0_MIDCMD_DATA0; reg <= mmSDMA0_RLC0_MIDCMD_CNTL; in kgd_hqd_sdma_dump()
H A Damdgpu_amdkfd_gfx_v9.c510 reg <= mmSDMA0_RLC0_MIDCMD_CNTL; reg++) in kgd_hqd_sdma_dump()
H A Damdgpu_amdkfd_gfx_v10.c522 reg <= mmSDMA0_RLC0_MIDCMD_CNTL; reg++) in kgd_hqd_sdma_dump()
/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/oss/
H A Doss_3_0_1_d.h292 #define mmSDMA0_RLC0_MIDCMD_CNTL 0x354a macro
H A Doss_3_0_d.h411 #define mmSDMA0_RLC0_MIDCMD_CNTL 0x3547 macro
/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h450 #define mmSDMA0_RLC0_MIDCMD_CNTL … macro