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Searched refs:mr0 (Results 1 – 3 of 3) sorted by relevance

/netbsd/sys/arch/sgimips/dev/
H A Dscnvar.h95 u_char mr0; /* MR0[7:3] */ member
H A Dscn.c430 dp->chan[chan].mr0 |= MR0_RXWD | MR0_RXINT; in scn_setchip()
432 dp->chan[chan].mr0 &= ~(MR0_RXWD | MR0_RXINT); in scn_setchip()
436 nmr0a = dp->chan[0].mr0 | (dp->mode & MR0_MODE); in scn_setchip()
455 if (dp->chan[chan].mr0 != mr0b) { in scn_setchip()
458 sc->sc_chbase[CH_MR] = dp->chan[chan].mr0; in scn_setchip()
/netbsd/sys/arch/powerpc/ibm4xx/dev/
H A Dif_emac.c1385 uint32_t mr0; in emac_smart_reset() local
1388 mr0 = EMAC_READ(sc, EMAC_MR0); in emac_smart_reset()
1389 if (mr0 & (MR0_TXE | MR0_RXE)) { in emac_smart_reset()
1390 mr0 &= ~(MR0_TXE | MR0_RXE); in emac_smart_reset()
1391 EMAC_WRITE(sc, EMAC_MR0, mr0); in emac_smart_reset()