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Searched refs:num_slices_v (Results 1 – 6 of 6) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
H A Damdgpu_dcn20_dsc.c183 DC_LOG_DSC("\tnum_slices_v %d", config->dc_dsc_cfg.num_slices_v); in dsc_config_log()
340 ASSERT(dsc_cfg->dc_dsc_cfg.num_slices_v); in dsc_prepare_config()
351 if (!dsc_cfg->dc_dsc_cfg.num_slices_v || !dsc_cfg->dc_dsc_cfg.num_slices_h || in dsc_prepare_config()
369 dsc_reg_vals->num_slices_v = dsc_cfg->dc_dsc_cfg.num_slices_v; in dsc_prepare_config()
381 dsc_reg_vals->pps.slice_height = dsc_cfg->pic_height / dsc_cfg->dc_dsc_cfg.num_slices_v; in dsc_prepare_config()
383 ASSERT(dsc_reg_vals->pps.slice_height * dsc_cfg->dc_dsc_cfg.num_slices_v == dsc_cfg->pic_height); in dsc_prepare_config()
384 if (!(dsc_reg_vals->pps.slice_height * dsc_cfg->dc_dsc_cfg.num_slices_v == dsc_cfg->pic_height)) { in dsc_prepare_config()
385 …ivisible by num_slices_v %d\n\n", __func__, dsc_cfg->pic_height, dsc_cfg->dc_dsc_cfg.num_slices_v); in dsc_prepare_config()
567 NUMBER_OF_SLICES_IN_VERTICAL_DIRECTION, reg_vals->num_slices_v - 1); in dsc_write_to_registers()
H A Ddcn20_dsc.h547 uint32_t num_slices_v; member
/netbsd/sys/external/bsd/drm2/dist/drm/amd/display/dc/
H A Ddc_hw_types.h706 uint32_t num_slices_v; /* Number of DSC slices - vertical */ member
/netbsd/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/
H A Damdgpu_dc_stream.c116 stream->timing.dsc_cfg.num_slices_v = 0; in dc_stream_construct()
H A Damdgpu_dc.c2019 update->dsc_config->num_slices_v != 0); in copy_stream_update_to_stream()
/netbsd/sys/external/bsd/drm2/dist/drm/amd/display/dc/dsc/
H A Damdgpu_dc_dsc.c756 dsc_cfg->num_slices_v = pic_height/slice_height; in setup_dsc_config()