Searched refs:pll_dw1 (Results 1 – 1 of 1) sorted by relevance
9174 u32 cmn_dw13, pll_dw0, pll_dw1, pll_dw2, pll_dw3; in chv_crtc_clock_get() local9184 pll_dw1 = vlv_dpio_read(dev_priv, pipe, CHV_PLL_DW1(port)); in chv_crtc_clock_get()9189 clock.m1 = (pll_dw1 & 0x7) == DPIO_CHV_M1_DIV_BY_2 ? 2 : 0; in chv_crtc_clock_get()9193 clock.n = (pll_dw1 >> DPIO_CHV_N_DIV_SHIFT) & 0xf; in chv_crtc_clock_get()