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Searched refs:radeon_get_ib_value (Results 1 – 9 of 9) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/radeon/
H A Dradeon_r600_cs.c889 header = radeon_get_ib_value(p, h_idx); in r600_cs_common_vline_parse()
1497 word0 = radeon_get_ib_value(p, idx + 0); in r600_check_texture_resource()
1504 word1 = radeon_get_ib_value(p, idx + 1); in r600_check_texture_resource()
1507 word4 = radeon_get_ib_value(p, idx + 4); in r600_check_texture_resource()
1508 word5 = radeon_get_ib_value(p, idx + 5); in r600_check_texture_resource()
1644 idx_value = radeon_get_ib_value(p, idx); in r600_packet3_check()
1658 tmp = radeon_get_ib_value(p, idx + 1); in r600_packet3_check()
1806 tmp = radeon_get_ib_value(p, idx) + in r600_packet3_check()
1836 tmp = radeon_get_ib_value(p, idx+2) + in r600_packet3_check()
2192 offset = radeon_get_ib_value(p, idx+0); in r600_packet3_check()
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H A Dradeon_evergreen_cs.c1816 idx_value = radeon_get_ib_value(p, idx); in evergreen_packet3_check()
1830 tmp = radeon_get_ib_value(p, idx + 1); in evergreen_packet3_check()
1958 radeon_get_ib_value(p, idx+1) + in evergreen_packet3_check()
2149 command = radeon_get_ib_value(p, idx+4); in evergreen_packet3_check()
2151 info = radeon_get_ib_value(p, idx+1); in evergreen_packet3_check()
2184 tmp = radeon_get_ib_value(p, idx) + in evergreen_packet3_check()
2222 tmp = radeon_get_ib_value(p, idx+2) + in evergreen_packet3_check()
2527 offset = radeon_get_ib_value(p, idx+1); in evergreen_packet3_check()
2546 offset = radeon_get_ib_value(p, idx+3); in evergreen_packet3_check()
2571 offset = radeon_get_ib_value(p, idx+0); in evergreen_packet3_check()
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H A Dradeon_vce.c536 offset = radeon_get_ib_value(p, lo); in radeon_vce_cs_reloc()
537 idx = radeon_get_ib_value(p, hi); in radeon_vce_cs_reloc()
623 uint32_t len = radeon_get_ib_value(p, p->idx); in radeon_vce_cs_parse()
624 uint32_t cmd = radeon_get_ib_value(p, p->idx + 1); in radeon_vce_cs_parse()
640 handle = radeon_get_ib_value(p, p->idx + 2); in radeon_vce_cs_parse()
659 *size = radeon_get_ib_value(p, p->idx + 8) * in radeon_vce_cs_parse()
660 radeon_get_ib_value(p, p->idx + 10) * in radeon_vce_cs_parse()
696 tmp = radeon_get_ib_value(p, p->idx + 4); in radeon_vce_cs_parse()
H A Dradeon_r300.c674 idx_value = radeon_get_ib_value(p, idx); in r300_packet0_check()
1230 ib[idx+1] = radeon_get_ib_value(p, idx + 1) + ((u32)reloc->gpu_offset); in r300_packet3_check()
1241 if (((radeon_get_ib_value(p, idx + 1) >> 4) & 0x3) != 3) { in r300_packet3_check()
1245 track->vap_vf_cntl = radeon_get_ib_value(p, idx + 1); in r300_packet3_check()
1256 if (((radeon_get_ib_value(p, idx) >> 4) & 0x3) != 3) { in r300_packet3_check()
1260 track->vap_vf_cntl = radeon_get_ib_value(p, idx); in r300_packet3_check()
1268 track->vap_vf_cntl = radeon_get_ib_value(p, idx + 1); in r300_packet3_check()
1275 track->vap_vf_cntl = radeon_get_ib_value(p, idx); in r300_packet3_check()
1282 track->vap_vf_cntl = radeon_get_ib_value(p, idx + 1); in r300_packet3_check()
1289 track->vap_vf_cntl = radeon_get_ib_value(p, idx); in r300_packet3_check()
H A Dradeon_r100.c1297 value = radeon_get_ib_value(p, idx); in r100_reloc_pitch_offset()
1333 c = radeon_get_ib_value(p, idx++) & 0x1F; in r100_packet3_load_vbpntr()
1349 idx_value = radeon_get_ib_value(p, idx); in r100_packet3_load_vbpntr()
1375 idx_value = radeon_get_ib_value(p, idx); in r100_packet3_load_vbpntr()
1481 header = radeon_get_ib_value(p, h_idx); in r100_cs_packet_parse_vline()
1482 crtc_id = radeon_get_ib_value(p, h_idx + 5); in r100_cs_packet_parse_vline()
1586 idx_value = radeon_get_ib_value(p, idx); in r100_packet0_check()
1918 value = radeon_get_ib_value(p, idx + 2); in r100_cs_track_check_pkt3_indx_buffer()
1975 track->max_indx = radeon_get_ib_value(p, idx+1); in r100_packet3_check()
2001 track->vap_vf_cntl = radeon_get_ib_value(p, idx); in r100_packet3_check()
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H A Dradeon_cs.c761 header = radeon_get_ib_value(p, idx); in radeon_cs_packet_parse()
797 printk("\t0x%08x <---\n", radeon_get_ib_value(p, i)); in radeon_cs_packet_parse()
799 printk("\t0x%08x\n", radeon_get_ib_value(p, i)); in radeon_cs_packet_parse()
882 idx = radeon_get_ib_value(p, p3reloc.idx + 1); in radeon_cs_packet_next_reloc()
H A Dradeon_uvd.c590 offset = radeon_get_ib_value(p, data0); in radeon_uvd_cs_reloc()
591 idx = radeon_get_ib_value(p, data1); in radeon_uvd_cs_reloc()
606 cmd = radeon_get_ib_value(p, p->idx) >> 1; in radeon_uvd_cs_reloc()
H A Dradeon_r200.c166 idx_value = radeon_get_ib_value(p, idx); in r200_packet0_check()
H A Dradeon.h1135 static inline u32 radeon_get_ib_value(struct radeon_cs_parser *p, int idx) in radeon_get_ib_value() function