/netbsd/sys/external/bsd/drm2/dist/drm/i915/gvt/ |
H A D | execlist.c | 47 #define execlist_ring_mmio(gvt, ring_id, offset) \ argument 48 (gvt->dev_priv->engine[ring_id]->mmio_base + (offset)) 67 return context_switch_events[ring_id]; in ring_id_to_context_switch_event() 101 int ring_id = execlist->ring_id; in emulate_execlist_status() local 103 ring_id, _EL_OFFSET_STATUS); in emulate_execlist_status() 136 int ring_id = execlist->ring_id; in emulate_csb_update() local 169 vgpu->hws_pga[ring_id]); in emulate_csb_update() 269 int ring_id = execlist->ring_id; in get_next_execlist_slot() local 387 int ring_id = workload->ring_id; in prepare_execlist_workload() local 407 int ring_id = workload->ring_id; in complete_execlist_workload() local [all …]
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H A D | mmio_context.c | 171 int ring_id, i; in load_render_mocs() local 177 for (ring_id = 0; ring_id < cnt; ring_id++) { in load_render_mocs() 180 offset.reg = regs[ring_id]; in load_render_mocs() 222 if (mmio->ring_id != ring_id || in restore_context_mmio_for_inhibit() 365 if (WARN_ON(ring_id >= cnt)) in handle_tlb_pending_event() 371 reg = _MMIO(regs[ring_id]); in handle_tlb_pending_event() 398 int ring_id) in switch_mocs() argument 423 offset.reg = regs[ring_id]; in switch_mocs() 440 if (ring_id == RCS0) { in switch_mocs() 475 int ring_id) in switch_mmio() argument [all …]
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H A D | scheduler.c | 136 int ring_id = workload->ring_id; in populate_shadow_context() local 162 if (ring_id == RCS0) { in populate_shadow_context() 685 int ring_id = workload->ring_id; in dispatch_workload() local 689 ring_id, workload); in dispatch_workload() 763 ring_id, workload); in pick_next_workload() 976 int ring_id; member 983 int ring_id = p->ring_id; in workload_thread() local 1111 param->ring_id = i; in intel_gvt_init_workload_scheduler() 1495 ring_id); in intel_vgpu_create_workload() 1527 workload->ring_id = ring_id; in intel_vgpu_create_workload() [all …]
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H A D | trace.h | 118 TP_PROTO(int id, char *type, int ring_id, int root_entry_type, 121 TP_ARGS(id, type, ring_id, root_entry_type, gma, gpa), 130 id, type, ring_id, root_entry_type, gma, gpa); 231 TP_PROTO(u8 vgpu_id, u8 ring_id, u32 ip_gma, u32 *cmd_va, 235 TP_ARGS(vgpu_id, ring_id, ip_gma, cmd_va, cmd_len, buf_type, 240 __field(u8, ring_id) 252 __entry->ring_id = ring_id; 265 __entry->ring_id,
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H A D | cmd_parser.c | 470 int ring_id; member 655 unsigned int opcode, int ring_id) in find_cmd_entry() argument 667 u32 cmd, int ring_id) in get_cmd_info() argument 671 opcode = get_opcode(cmd, ring_id); in get_cmd_info() 988 if (s->ring_id == BCS0 && in cmd_handler_lri() 1764 cmd, get_opcode(cmd, s->ring_id), in find_bb_size() 1810 cmd, get_opcode(cmd, s->ring_id), in audit_bb_end() 2789 s.ring_id = workload->ring_id; in scan_workload() 2838 s.ring_id = workload->ring_id; in scan_wa_ctx() 2863 int ring_id = workload->ring_id; in shadow_workload_ring_buffer() local [all …]
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H A D | scheduler.h | 84 int ring_id; member 134 #define workload_q_head(vgpu, ring_id) \ argument 135 (&(vgpu->submission.workload_q_head[ring_id])) 160 intel_vgpu_create_workload(struct intel_vgpu *vgpu, int ring_id,
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H A D | sched_policy.c | 452 int ring_id; in intel_vgpu_stop_schedule() local 475 for (ring_id = 0; ring_id < I915_NUM_ENGINES; ring_id++) { in intel_vgpu_stop_schedule() 476 if (scheduler->engine_owner[ring_id] == vgpu) { in intel_vgpu_stop_schedule() 477 intel_gvt_switch_mmio(vgpu, NULL, ring_id); in intel_vgpu_stop_schedule() 478 scheduler->engine_owner[ring_id] = NULL; in intel_vgpu_stop_schedule()
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H A D | mmio_context.h | 42 int ring_id; member 50 struct intel_vgpu *next, int ring_id);
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H A D | interrupt.h | 234 int gvt_ring_id_to_pipe_control_notify_event(int ring_id); 235 int gvt_ring_id_to_mi_flush_dw_event(int ring_id); 236 int gvt_ring_id_to_mi_user_interrupt_event(int ring_id);
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H A D | execlist.h | 175 int ring_id; member 184 int intel_vgpu_submit_execlist(struct intel_vgpu *vgpu, int ring_id);
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H A D | handlers.c | 529 vgpu->id, ring_id, offset, bytes); in force_nonpriv_write() 1498 if (unlikely(ring_id < 0 || ring_id >= I915_NUM_ENGINES)) { in hws_pga_write() 1503 vgpu->hws_pga[ring_id] = value; in hws_pga_write() 1663 int ring_id; in mmio_read_from_hw() local 1673 if (ring_id >= 0) in mmio_read_from_hw() 1676 if (ring_id < 0 || vgpu == gvt->scheduler.engine_owner[ring_id] || in mmio_read_from_hw() 1695 if (WARN_ON(ring_id < 0 || ring_id >= I915_NUM_ENGINES)) in elsp_mmio_write() 1698 execlist = &vgpu->submission.execlist[ring_id]; in elsp_mmio_write() 1705 ring_id); in elsp_mmio_write() 1753 ring_id); in ring_mode_mmio_write() [all …]
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/netbsd/sys/external/bsd/drm2/dist/drm/amd/amdkfd/ |
H A D | cik_event_interrupt.c | 60 tmp_ihre->ring_id &= 0x000000ff; in cik_event_interrupt_isr() 61 tmp_ihre->ring_id |= vmid << 8; in cik_event_interrupt_isr() 62 tmp_ihre->ring_id |= pasid << 16; in cik_event_interrupt_isr() 70 vmid = (ihre->ring_id & 0x0000ff00) >> 8; in cik_event_interrupt_isr() 76 pasid = (ihre->ring_id & 0xffff0000) >> 16; in cik_event_interrupt_isr() 97 unsigned int vmid = (ihre->ring_id & 0x0000ff00) >> 8; in cik_event_interrupt_wq() 98 unsigned int pasid = (ihre->ring_id & 0xffff0000) >> 16; in cik_event_interrupt_wq()
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H A D | kfd_int_process_v9.c | 115 uint16_t ring_id = SOC15_RING_ID_FROM_IH_ENTRY(ih_ring_entry); in event_interrupt_wq_v9() local 121 info.prot_valid = ring_id & 0x08; in event_interrupt_wq_v9() 122 info.prot_read = ring_id & 0x10; in event_interrupt_wq_v9() 123 info.prot_write = ring_id & 0x20; in event_interrupt_wq_v9()
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H A D | cik_int.h | 33 uint32_t ring_id; member
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/netbsd/sys/dev/pci/ |
H A D | xmm7360.c | 704 xmm->cp->s_rptr[ring_id] = xmm->cp->s_wptr[ring_id] = 0; in xmm7360_td_ring_activate() 732 xmm7360_td_ring_activate(xmm, ring_id); in xmm7360_td_ring_create() 751 xmm7360_td_ring_deactivate(xmm, ring_id); in xmm7360_td_ring_destroy() 768 u8 wptr = xmm->cp->s_wptr[ring_id]; in xmm7360_td_ring_write() 772 BUG_ON(ring_id & 1); in xmm7360_td_ring_write() 782 xmm->cp->s_wptr[ring_id] = wptr; in xmm7360_td_ring_write() 788 u8 wptr = xmm->cp->s_wptr[ring_id]; in xmm7360_td_ring_full() 790 return wptr == xmm->cp->s_rptr[ring_id]; in xmm7360_td_ring_full() 796 u8 wptr = xmm->cp->s_wptr[ring_id]; in xmm7360_td_ring_read() 803 if (!(ring_id & 1)) { in xmm7360_td_ring_read() [all …]
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/netbsd/external/bsd/libpcap/dist/ |
H A D | pcap-snf.c | 258 int flags = -1, ring_id = -1; in snf_activate() local 294 ring_id = (int) strtol(nr, NULL, 0); in snf_activate() 296 err = snf_ring_open_id(ps->snf_handle, ring_id, &ps->snf_ring); in snf_activate() 299 err, "snf_ring_open_id(ring=%d) failed", ring_id); in snf_activate()
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/netbsd/sys/dev/pci/ixgbe/ |
H A D | ixgbe_netmap.c | 211 struct tx_ring *txr = &adapter->tx_rings[kring->ring_id]; in ixgbe_netmap_txsync() 349 nic_i = IXGBE_READ_REG(&adapter->hw, IXGBE_TDH(kring->ring_id)); in ixgbe_netmap_txsync() 395 struct rx_ring *rxr = &adapter->rx_rings[kring->ring_id]; in ixgbe_netmap_rxsync()
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/netbsd/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
H A D | amdgpu_trace.h | 85 __field(unsigned, ring_id) 97 __entry->ring_id = iv->ring_id; 111 __entry->ring_id, __entry->vmid,
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H A D | amdgpu_irq.h | 51 unsigned ring_id; member
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H A D | amdgpu_gfx_v10_0.c | 1246 ring = &adev->gfx.gfx_ring[ring_id]; in gfx_v10_0_gfx_ring_init() 1255 if (!ring_id) in gfx_v10_0_gfx_ring_init() 1276 ring = &adev->gfx.compute_ring[ring_id]; in gfx_v10_0_compute_ring_init() 1287 + (ring_id * GFX10_MEC_HPD_SIZE); in gfx_v10_0_compute_ring_init() 1305 int i, j, k, r, ring_id = 0; in gfx_v10_0_sw_init() local 1387 ring_id++; in gfx_v10_0_sw_init() 1392 ring_id = 0; in gfx_v10_0_sw_init() 1406 ring_id++; in gfx_v10_0_sw_init() 4956 me_id = (entry->ring_id & 0x0c) >> 2; in gfx_v10_0_eop_irq() 5026 me_id = (entry->ring_id & 0x0c) >> 2; in gfx_v10_0_handle_priv_fault() [all …]
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H A D | amdgpu_sdma_v2_4.c | 1062 instance_id = (entry->ring_id & 0x3) >> 0; in sdma_v2_4_process_trap_irq() 1063 queue_id = (entry->ring_id & 0xc) >> 2; in sdma_v2_4_process_trap_irq() 1103 instance_id = (entry->ring_id & 0x3) >> 0; in sdma_v2_4_process_illegal_inst_irq() 1104 queue_id = (entry->ring_id & 0xc) >> 2; in sdma_v2_4_process_illegal_inst_irq()
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H A D | amdgpu_gfx_v7_0.c | 3086 struct amdgpu_ring *ring = &adev->gfx.compute_ring[ring_id]; in gfx_v7_0_compute_queue_init() 4410 struct amdgpu_ring *ring = &adev->gfx.compute_ring[ring_id]; in gfx_v7_0_compute_ring_init() 4419 ring->doorbell_index = adev->doorbell_index.mec_ring0 + ring_id; in gfx_v7_0_compute_ring_init() 4440 int i, j, k, r, ring_id; in gfx_v7_0_sw_init() local 4506 ring_id = 0; in gfx_v7_0_sw_init() 4514 ring_id, in gfx_v7_0_sw_init() 4519 ring_id++; in gfx_v7_0_sw_init() 4881 me_id = (entry->ring_id & 0x0c) >> 2; in gfx_v7_0_eop_irq() 4882 pipe_id = (entry->ring_id & 0x03) >> 0; in gfx_v7_0_eop_irq() 4906 me_id = (entry->ring_id & 0x0c) >> 2; in gfx_v7_0_fault() [all …]
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H A D | amdgpu_sdma_v3_0.c | 1396 instance_id = (entry->ring_id & 0x3) >> 0; in sdma_v3_0_process_trap_irq() 1397 queue_id = (entry->ring_id & 0xc) >> 2; in sdma_v3_0_process_trap_irq() 1437 instance_id = (entry->ring_id & 0x3) >> 0; in sdma_v3_0_process_illegal_inst_irq() 1438 queue_id = (entry->ring_id & 0xc) >> 2; in sdma_v3_0_process_illegal_inst_irq()
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H A D | amdgpu_vega10_ih.c | 461 entry->ring_id = (dw[0] >> 16) & 0xff; in vega10_ih_decode_iv() 550 switch (entry->ring_id) { in vega10_ih_self_irq()
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H A D | amdgpu_si_ih.c | 144 entry->ring_id = dw[2] & 0xff; in si_ih_decode_iv()
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