Searched refs:v5f32 (Results 1 – 8 of 8) sorted by relevance
| /netbsd/external/apache2/llvm/dist/llvm/include/llvm/Support/ |
| H A D | MachineValueType.h | 148 v5f32 = 91, // 5 x f32 enumerator
624 case v5f32: in getVectorElementType()
746 case v5f32: return 5; in getVectorMinNumElements()
931 case v5f32: return TypeSize::Fixed(160); in getSizeInBits()
1226 if (NumElements == 5) return MVT::v5f32; in getVectorVT()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | SIRegisterInfo.td | 719 def SGPR_160 : RegisterClass<"AMDGPU", [v5i32, v5f32], 32,
724 def SReg_160 : RegisterClass<"AMDGPU", [v5i32, v5f32], 32,
813 defm VReg_160 : VRegClass<5, [v5i32, v5f32], (add VGPR_160)>;
834 defm AReg_160 : ARegClass<5, [v5i32, v5f32], (add AGPR_160)>;
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| H A D | AMDGPUISelLowering.cpp | 78 setOperationAction(ISD::LOAD, MVT::v5f32, Promote); in AMDGPUTargetLowering()
79 AddPromotedToType(ISD::LOAD, MVT::v5f32, MVT::v5i32); in AMDGPUTargetLowering()
198 setOperationAction(ISD::STORE, MVT::v5f32, Promote); in AMDGPUTargetLowering()
199 AddPromotedToType(ISD::STORE, MVT::v5f32, MVT::v5i32); in AMDGPUTargetLowering()
327 setOperationAction(ISD::CONCAT_VECTORS, MVT::v5f32, Custom); in AMDGPUTargetLowering()
336 setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v5f32, Custom); in AMDGPUTargetLowering()
457 MVT::v2f32, MVT::v3f32, MVT::v4f32, MVT::v5f32 in AMDGPUTargetLowering()
505 setOperationAction(ISD::SELECT, MVT::v5f32, Promote); in AMDGPUTargetLowering()
506 AddPromotedToType(ISD::SELECT, MVT::v5f32, MVT::v5i32); in AMDGPUTargetLowering()
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| H A D | SIInstructions.td | 1048 f32, v5f32, Index, !cast<SubRegIndex>(sub#Index)
1051 f32, v5f32, Index, !cast<SubRegIndex>(sub#Index)
1205 def : BitConvert <v5i32, v5f32, SGPR_160>;
1206 def : BitConvert <v5f32, v5i32, SGPR_160>;
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| H A D | SIISelLowering.cpp | 102 addRegisterClass(MVT::v5f32, TRI->getVGPRClassForBitWidth(160)); in SITargetLowering()
372 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v5f32, Custom); in SITargetLowering()
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| /netbsd/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | ValueTypes.td | 121 def v5f32 : ValueType<160, 91>; // 5 x f32 vector value
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| /netbsd/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | ValueTypes.cpp | 354 case MVT::v5f32: in getTypeForEVT()
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| /netbsd/external/apache2/llvm/dist/llvm/utils/TableGen/ |
| H A D | CodeGenTarget.cpp | 155 case MVT::v5f32: return "MVT::v5f32"; in getEnumName()
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