Home
last modified time | relevance | path

Searched refs:ADDR_SURF_BANK_WIDTH_1 (Results 1 – 25 of 32) sorted by relevance

12

/openbsd/sys/dev/pci/drm/amd/amdgpu/
H A Dgfx_v6_0.c409 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in gfx_v6_0_tiling_mode_table_init()
417 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in gfx_v6_0_tiling_mode_table_init()
425 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in gfx_v6_0_tiling_mode_table_init()
432 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in gfx_v6_0_tiling_mode_table_init()
444 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in gfx_v6_0_tiling_mode_table_init()
452 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in gfx_v6_0_tiling_mode_table_init()
460 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in gfx_v6_0_tiling_mode_table_init()
472 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in gfx_v6_0_tiling_mode_table_init()
480 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in gfx_v6_0_tiling_mode_table_init()
488 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in gfx_v6_0_tiling_mode_table_init()
[all …]
H A Dgfx_v8_0.c2207 mod2array[3] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in gfx_v8_0_tiling_mode_table_init()
2211 mod2array[4] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in gfx_v8_0_tiling_mode_table_init()
2215 mod2array[5] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in gfx_v8_0_tiling_mode_table_init()
2219 mod2array[6] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in gfx_v8_0_tiling_mode_table_init()
2387 mod2array[0] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in gfx_v8_0_tiling_mode_table_init()
2391 mod2array[1] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in gfx_v8_0_tiling_mode_table_init()
2395 mod2array[2] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in gfx_v8_0_tiling_mode_table_init()
2399 mod2array[3] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in gfx_v8_0_tiling_mode_table_init()
2403 mod2array[4] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in gfx_v8_0_tiling_mode_table_init()
2407 mod2array[5] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in gfx_v8_0_tiling_mode_table_init()
[all …]
H A Dgfx_v7_0.c1122 macrotile[0] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in gfx_v7_0_tiling_mode_table_init()
1126 macrotile[1] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in gfx_v7_0_tiling_mode_table_init()
1130 macrotile[2] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in gfx_v7_0_tiling_mode_table_init()
1134 macrotile[3] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in gfx_v7_0_tiling_mode_table_init()
1138 macrotile[4] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in gfx_v7_0_tiling_mode_table_init()
1142 macrotile[5] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in gfx_v7_0_tiling_mode_table_init()
1146 macrotile[6] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in gfx_v7_0_tiling_mode_table_init()
1305 macrotile[0] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in gfx_v7_0_tiling_mode_table_init()
1309 macrotile[1] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in gfx_v7_0_tiling_mode_table_init()
1313 macrotile[2] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in gfx_v7_0_tiling_mode_table_init()
[all …]
H A Dsid.h1204 # define ADDR_SURF_BANK_WIDTH_1 0 macro
/openbsd/sys/dev/pci/drm/radeon/
H A Dsi.c2520 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in si_tiling_mode_table_init()
2529 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in si_tiling_mode_table_init()
2538 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in si_tiling_mode_table_init()
2547 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in si_tiling_mode_table_init()
2556 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in si_tiling_mode_table_init()
2565 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in si_tiling_mode_table_init()
2574 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in si_tiling_mode_table_init()
2583 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in si_tiling_mode_table_init()
2592 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in si_tiling_mode_table_init()
2601 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in si_tiling_mode_table_init()
[all …]
H A Dcik.c2436 macrotile[0] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in cik_tiling_mode_table_init()
2440 macrotile[1] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in cik_tiling_mode_table_init()
2444 macrotile[2] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in cik_tiling_mode_table_init()
2448 macrotile[3] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in cik_tiling_mode_table_init()
2452 macrotile[4] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in cik_tiling_mode_table_init()
2456 macrotile[5] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in cik_tiling_mode_table_init()
2460 macrotile[6] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in cik_tiling_mode_table_init()
2464 macrotile[8] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in cik_tiling_mode_table_init()
2468 macrotile[9] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in cik_tiling_mode_table_init()
2579 macrotile[0] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | in cik_tiling_mode_table_init()
[all …]
H A Dsid.h1207 # define ADDR_SURF_BANK_WIDTH_1 0 macro
H A Dcikd.h1261 # define ADDR_SURF_BANK_WIDTH_1 0 macro
H A Devergreend.h2218 # define ADDR_SURF_BANK_WIDTH_1 0 macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/bif/
H A Dbif_5_1_enum.h958 ADDR_SURF_BANK_WIDTH_1 = 0x0, enumerator
H A Dbif_5_0_enum.h1088 ADDR_SURF_BANK_WIDTH_1 = 0x0, enumerator
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gmc/
H A Dgmc_8_2_enum.h958 ADDR_SURF_BANK_WIDTH_1 = 0x0, enumerator
H A Dgmc_8_1_enum.h1088 ADDR_SURF_BANK_WIDTH_1 = 0x0, enumerator
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/smu/
H A Dsmu_8_0_enum.h958 ADDR_SURF_BANK_WIDTH_1 = 0x0, enumerator
H A Dsmu_7_1_0_enum.h1117 ADDR_SURF_BANK_WIDTH_1 = 0x0, enumerator
H A Dsmu_7_1_1_enum.h1118 ADDR_SURF_BANK_WIDTH_1 = 0x0, enumerator
H A Dsmu_7_1_2_enum.h1136 ADDR_SURF_BANK_WIDTH_1 = 0x0, enumerator
H A Dsmu_7_1_3_enum.h1172 ADDR_SURF_BANK_WIDTH_1 = 0x0, enumerator
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_8_0_enum.h1043 ADDR_SURF_BANK_WIDTH_1 = 0x0, enumerator
H A Ddce_10_0_enum.h1663 ADDR_SURF_BANK_WIDTH_1 = 0x0, enumerator
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/uvd/
H A Duvd_6_0_enum.h971 ADDR_SURF_BANK_WIDTH_1 = 0x0, enumerator
H A Duvd_5_0_enum.h1101 ADDR_SURF_BANK_WIDTH_1 = 0x0, enumerator
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/oss/
H A Doss_2_4_enum.h1253 ADDR_SURF_BANK_WIDTH_1 = 0x0, enumerator
H A Doss_3_0_1_enum.h1354 ADDR_SURF_BANK_WIDTH_1 = 0x0, enumerator
H A Doss_3_0_enum.h1387 ADDR_SURF_BANK_WIDTH_1 = 0x0, enumerator

12