| /openbsd/gnu/llvm/compiler-rt/lib/xray/ |
| H A D | xray_trampoline_AArch64.S | 35 ADRP X1, _ZN6__xray19XRayPatchedFunctionE
88 ADRP X1, _ZN6__xray19XRayPatchedFunctionE
137 ADRP X1, _ZN6__xray19XRayPatchedFunctionE
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| /openbsd/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64ReturnProtectorLowering.cpp | 42 BuildMI(MBB, MI, MBBDL, TII->get(AArch64::ADRP), REG) in insertReturnProtectorPrologue()
67 BuildMI(MBB, MI, MBBDL, TII->get(AArch64::ADRP), AArch64::X9) in insertReturnProtectorEpilogue()
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| H A D | AArch64MacroFusion.cpp | 164 if ((FirstMI == nullptr || FirstMI->getOpcode() == AArch64::ADRP) && in isAdrpAddPair()
231 case AArch64::ADRP: in isAddressLdStPair()
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| H A D | AArch64CollectLOH.cpp | 180 case AArch64::ADRP: in canDefBePartOfLOH()
578 case AArch64::ADRP: in runOnMachineFunction()
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| H A D | AArch64SchedPredExynos.td | 122 [ADR, ADRP,
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| H A D | AArch64AsmPrinter.cpp | 657 MCInstBuilder(AArch64::ADRP) in emitHwasanMemaccessSymbols()
1287 if (MI->getOpcode() == AArch64::ADRP) { in emitInstruction()
1464 Adrp.setOpcode(AArch64::ADRP); in emitInstruction()
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| H A D | AArch64ExpandPseudoInsts.cpp | 1177 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::ADRP), DstReg); in expandMI()
1233 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::ADRP), DstReg) in expandMI()
1255 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::ADRP), DstReg) in expandMI()
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| H A D | AArch64ISelLowering.h | 75 ADRP, // Page address of a TargetGlobalAddress operand. enumerator
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| H A D | AArch64FastISel.cpp | 431 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(AArch64::ADRP), in materializeFP()
463 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(AArch64::ADRP), in materializeGV()
495 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(AArch64::ADRP), in materializeGV()
3256 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(AArch64::ADRP), in fastLowerCall()
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| H A D | AArch64SchedCyclone.td | 141 // ADR,ADRP
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| H A D | AArch64SchedExynosM3.td | 510 def : InstRW<[M3WriteZ0], (instrs ADR, ADRP)>;
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| H A D | AArch64SchedTSV110.td | 410 def : InstRW<[TSV110Wr_1cyc_1ALUAB], (instrs ADR, ADRP)>;
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| H A D | AArch64SchedAmpere1.td | 979 def : InstRW<[Ampere1Write_1cyc_1A], (instrs ADR, ADRP)>;
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| H A D | AArch64SchedExynosM4.td | 607 def : InstRW<[M4WriteZ0], (instrs ADR, ADRP)>;
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| H A D | AArch64SchedExynosM5.td | 654 def : InstRW<[M5WriteZ0], (instrs ADR, ADRP)>;
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| H A D | AArch64InstrInfo.cpp | 1896 BuildMI(MBB, FirstEpilogSEH, DL, TII->get(AArch64::ADRP)) in expandPostRAPseudo()
2018 BuildMI(MBB, MI, DL, get(AArch64::ADRP), Reg) in expandPostRAPseudo()
7754 if (MI.getOpcode() == AArch64::ADRP) in getOutliningType()
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| H A D | AArch64SchedFalkorDetails.td | 1233 def : InstRW<[FalkorWr_1XYZB_0cyc], (instregex "^ADRP?$")>; // imm fwd
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| H A D | AArch64ISelLowering.cpp | 2296 MAKE_CASE(AArch64ISD::ADRP) in getTargetNodeName()
7949 SDValue ADRP = DAG.getNode(AArch64ISD::ADRP, DL, Ty, Hi); in getAddr() local
7950 return DAG.getNode(AArch64ISD::ADDlow, DL, Ty, ADRP, Lo); in getAddr()
8312 SDValue ADRP = DAG.getNode(AArch64ISD::ADRP, DL, PtrVT, TLSIndexHi); in LowerWindowsGlobalTLSAddress() local
8314 DAG.getNode(AArch64ISD::ADDlow, DL, PtrVT, ADRP, TLSIndexLo); in LowerWindowsGlobalTLSAddress()
22801 case AArch64::ADRP: in shouldLocalize()
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| H A D | AArch64InstrInfo.td | 566 def AArch64adrp : SDNode<"AArch64ISD::ADRP", SDTIntUnaryOp, []>;
2536 def ADRP : ADRI<1, "adrp", adrplabel,
2545 def : Pat<(AArch64adrp tconstpool:$cp), (ADRP tconstpool:$cp)>;
2546 def : Pat<(AArch64adrp tblockaddress:$cp), (ADRP tblockaddress:$cp)>;
2547 def : Pat<(AArch64adrp texternalsym:$sym), (ADRP texternalsym:$sym)>;
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| /openbsd/gnu/llvm/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64LegalizerInfo.cpp | 1012 auto ADRP = MIRBuilder.buildInstr(AArch64::ADRP, {LLT::pointer(0, 64)}, {}) in legalizeSmallCMGlobalValue() local
1015 MRI.setRegClass(ADRP.getReg(0), &AArch64::GPR64RegClass); in legalizeSmallCMGlobalValue()
1033 ADRP = MIRBuilder.buildInstr(AArch64::MOVKXi, {LLT::pointer(0, 64)}, {ADRP}) in legalizeSmallCMGlobalValue()
1037 MRI.setRegClass(ADRP.getReg(0), &AArch64::GPR64RegClass); in legalizeSmallCMGlobalValue()
1040 MIRBuilder.buildInstr(AArch64::G_ADD_LOW, {DstReg}, {ADRP}) in legalizeSmallCMGlobalValue()
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| H A D | AArch64InstructionSelector.cpp | 2496 if (BaseMI->getOpcode() != AArch64::ADRP) { in select()
4383 MIRBuilder.buildInstr(AArch64::ADRP, {&AArch64::GPR64RegClass}, {}) in emitLoadFromConstantPool()
6474 if (Adrp.getOpcode() != AArch64::ADRP) in tryFoldAddLowIntoImm()
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| /openbsd/gnu/llvm/llvm/lib/Target/AArch64/Disassembler/ |
| H A D | AArch64ExternalSymbolizer.cpp | 94 } else if (MI.getOpcode() == AArch64::ADRP) { in tryAddingSymbolicOperand()
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| /openbsd/gnu/llvm/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCTargetDesc.cpp | 416 if (Inst.getOpcode() == AArch64::ADRP) in evaluateBranch()
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