Home
last modified time | relevance | path

Searched refs:ATTR07__ATTR_PAL__SHIFT (Results 1 – 19 of 19) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h395 #define ATTR07__ATTR_PAL__SHIFT 0x00000000 macro
H A Ddce_8_0_sh_mask.h10894 #define ATTR07__ATTR_PAL__SHIFT 0x0 macro
H A Ddce_10_0_sh_mask.h11278 #define ATTR07__ATTR_PAL__SHIFT 0x0 macro
H A Ddce_11_0_sh_mask.h11090 #define ATTR07__ATTR_PAL__SHIFT 0x0 macro
H A Ddce_11_2_sh_mask.h12344 #define ATTR07__ATTR_PAL__SHIFT 0x0 macro
H A Ddce_12_0_sh_mask.h64739 #define ATTR07__ATTR_PAL__SHIFT macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h27460 #define ATTR07__ATTR_PAL__SHIFT macro
H A Ddcn_1_0_sh_mask.h46400 #define ATTR07__ATTR_PAL__SHIFT macro
H A Ddcn_2_1_0_sh_mask.h48764 #define ATTR07__ATTR_PAL__SHIFT macro
H A Ddcn_3_0_1_sh_mask.h45487 #define ATTR07__ATTR_PAL__SHIFT macro
H A Ddcn_3_2_1_sh_mask.h48706 #define ATTR07__ATTR_PAL__SHIFT macro
H A Ddcn_3_1_2_sh_mask.h52887 #define ATTR07__ATTR_PAL__SHIFT macro
H A Ddcn_3_1_5_sh_mask.h51967 #define ATTR07__ATTR_PAL__SHIFT macro
H A Ddcn_3_1_4_sh_mask.h395 #define ATTR07__ATTR_PAL__SHIFT macro
H A Ddcn_3_1_6_sh_mask.h54699 #define ATTR07__ATTR_PAL__SHIFT macro
H A Ddcn_3_0_2_sh_mask.h54507 #define ATTR07__ATTR_PAL__SHIFT macro
H A Ddcn_2_0_0_sh_mask.h60011 #define ATTR07__ATTR_PAL__SHIFT macro
H A Ddcn_3_0_0_sh_mask.h63085 #define ATTR07__ATTR_PAL__SHIFT macro
H A Ddcn_3_2_0_sh_mask.h48708 #define ATTR07__ATTR_PAL__SHIFT macro