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Searched refs:AddrReg (Results 1 – 25 of 29) sorted by relevance

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/openbsd/gnu/llvm/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsNaClELFStreamer.cpp101 void emitMask(unsigned AddrReg, unsigned MaskReg, in emitMask() argument
105 MaskInst.addOperand(MCOperand::createReg(AddrReg)); in emitMask()
106 MaskInst.addOperand(MCOperand::createReg(AddrReg)); in emitMask()
114 unsigned AddrReg = MI.getOperand(0).getReg(); in sandboxIndirectJump() local
117 emitMask(AddrReg, IndirectBranchMaskReg, STI); in sandboxIndirectJump()
/openbsd/gnu/llvm/llvm/lib/Target/LoongArch/
H A DLoongArchExpandAtomicPseudoInsts.cpp154 Register AddrReg = MI.getOperand(2).getReg(); in doAtomicBinOpExpansion() local
170 .addReg(AddrReg) in doAtomicBinOpExpansion()
217 .addReg(AddrReg) in doAtomicBinOpExpansion()
270 .addReg(AddrReg) in doMaskedAtomicBinOpExpansion()
305 .addReg(AddrReg) in doMaskedAtomicBinOpExpansion()
411 .addReg(AddrReg) in expandAtomicMinMaxOp()
469 .addReg(AddrReg) in expandAtomicMinMaxOp()
531 .addReg(AddrReg) in expandAtomicCmpXchg()
551 .addReg(AddrReg) in expandAtomicCmpXchg()
565 .addReg(AddrReg) in expandAtomicCmpXchg()
[all …]
/openbsd/gnu/llvm/llvm/lib/Target/RISCV/
H A DRISCVExpandAtomicPseudoInsts.cpp223 Register AddrReg = MI.getOperand(2).getReg(); in doAtomicBinOpExpansion() local
234 .addReg(AddrReg); in doAtomicBinOpExpansion()
248 .addReg(AddrReg) in doAtomicBinOpExpansion()
300 .addReg(AddrReg); in doMaskedAtomicBinOpExpansion()
333 .addReg(AddrReg) in doMaskedAtomicBinOpExpansion()
440 .addReg(AddrReg); in expandAtomicMinMaxOp()
492 .addReg(AddrReg) in expandAtomicMinMaxOp()
611 .addReg(AddrReg); in expandAtomicCmpXchg()
620 .addReg(AddrReg) in expandAtomicCmpXchg()
633 .addReg(AddrReg); in expandAtomicCmpXchg()
[all …]
/openbsd/gnu/llvm/llvm/lib/Target/ARC/
H A DARCExpandPseudos.cpp65 Register AddrReg = MF.getRegInfo().createVirtualRegister(&ARC::GPR32RegClass); in expandStore() local
68 BuildMI(*SI.getParent(), SI, SI.getDebugLoc(), TII->get(AddOpc), AddrReg) in expandStore()
74 .addReg(AddrReg) in expandStore()
/openbsd/gnu/llvm/llvm/lib/Target/M68k/GISel/
H A DM68kCallLowering.cpp63 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress() local
65 return AddrReg.getReg(0); in getStackAddress()
158 MachineInstrBuilder AddrReg = MIRBuilder.buildFrameIndex(FramePtr, FI); in getStackAddress() local
160 return AddrReg.getReg(0); in getStackAddress()
/openbsd/gnu/llvm/llvm/lib/Target/AMDGPU/
H A DR600InstrInfo.cpp1099 unsigned AddrReg; in buildIndirectWrite() local
1102 case 0: AddrReg = R600::R600_AddrRegClass.getRegister(Address); break; in buildIndirectWrite()
1103 case 1: AddrReg = R600::R600_Addr_YRegClass.getRegister(Address); break; in buildIndirectWrite()
1104 case 2: AddrReg = R600::R600_Addr_ZRegClass.getRegister(Address); break; in buildIndirectWrite()
1105 case 3: AddrReg = R600::R600_Addr_WRegClass.getRegister(Address); break; in buildIndirectWrite()
1112 AddrReg, ValueReg) in buildIndirectWrite()
1131 unsigned AddrReg; in buildIndirectRead() local
1134 case 0: AddrReg = R600::R600_AddrRegClass.getRegister(Address); break; in buildIndirectRead()
1135 case 1: AddrReg = R600::R600_Addr_YRegClass.getRegister(Address); break; in buildIndirectRead()
1136 case 2: AddrReg = R600::R600_Addr_ZRegClass.getRegister(Address); break; in buildIndirectRead()
[all …]
H A DSILoadStoreOptimizer.cpp121 const MachineOperand *AddrReg[MaxAddressRegs]; member
133 if (AddrReg[i]->isImm() || AddrRegNext.isImm()) { in hasSameBaseAddress()
153 const MachineOperand *AddrOp = AddrReg[i]; in hasMergeableAddress()
787 AddrReg[J] = &I->getOperand(AddrIdx[J]); in setMI()
1188 Register BaseReg = AddrReg->getReg(); in mergeRead2Pair()
1189 unsigned BaseSubReg = AddrReg->getSubReg(); in mergeRead2Pair()
1201 .addReg(AddrReg->getReg(), 0, BaseSubReg) in mergeRead2Pair()
1256 const MachineOperand *AddrReg = in mergeWrite2Pair() local
1280 Register BaseReg = AddrReg->getReg(); in mergeWrite2Pair()
1281 unsigned BaseSubReg = AddrReg->getSubReg(); in mergeWrite2Pair()
[all …]
H A DAMDGPUCallLowering.cpp112 auto AddrReg = MIRBuilder.buildFrameIndex( in getStackAddress() local
115 return AddrReg.getReg(0); in getStackAddress()
225 auto AddrReg = MIRBuilder.buildPtrAdd(PtrTy, SPReg, OffsetReg); in getStackAddress() local
227 return AddrReg.getReg(0); in getStackAddress()
H A DAMDGPULegalizerInfo.cpp4783 Register AddrReg = SrcOp.getReg(); in packImage16bitOpsToDwords() local
4789 (B.getMRI()->getType(AddrReg) == S16)) { in packImage16bitOpsToDwords()
4794 B.buildBuildVector(V2S16, {AddrReg, B.buildUndef(S16).getReg(0)}) in packImage16bitOpsToDwords()
4800 AddrReg = B.buildBitcast(V2S16, AddrReg).getReg(0); in packImage16bitOpsToDwords()
4801 PackedAddrs.push_back(AddrReg); in packImage16bitOpsToDwords()
4815 B.buildBuildVector(V2S16, {AddrReg, B.buildUndef(S16).getReg(0)}) in packImage16bitOpsToDwords()
4820 V2S16, {AddrReg, MI.getOperand(ArgOffset + I + 1).getReg()}) in packImage16bitOpsToDwords()
/openbsd/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64AsmPrinter.cpp327 Register AddrReg = MI.getOperand(0).getReg(); in LowerKCFI_CHECK() local
330 assert(std::next(MI.getIterator())->getOperand(0).getReg() == AddrReg && in LowerKCFI_CHECK()
336 if (AddrReg == AArch64::XZR) { in LowerKCFI_CHECK()
339 AddrReg = getXRegFromWReg(ScratchRegs[0]); in LowerKCFI_CHECK()
341 .addReg(AddrReg) in LowerKCFI_CHECK()
351 if (Reg == getWRegFromXReg(AddrReg)) { in LowerKCFI_CHECK()
356 assert(ScratchRegs[0] != AddrReg && ScratchRegs[1] != AddrReg && in LowerKCFI_CHECK()
371 .addReg(AddrReg) in LowerKCFI_CHECK()
408 switch (AddrReg) { in LowerKCFI_CHECK()
410 AddrIndex = AddrReg - AArch64::X0; in LowerKCFI_CHECK()
H A DAArch64SIMDInstrOpt.cpp507 unsigned SeqReg, AddrReg; in optimizeLdStInterleave() local
521 AddrReg = MI.getOperand(1).getReg(); in optimizeLdStInterleave()
575 .addReg(AddrReg) in optimizeLdStInterleave()
615 .addReg(AddrReg) in optimizeLdStInterleave()
620 .addReg(AddrReg) in optimizeLdStInterleave()
H A DAArch64ExpandPseudoInsts.cpp200 Register AddrReg = MI.getOperand(2).getReg(); in expandCMP_SWAP() local
222 .addReg(AddrReg); in expandCMP_SWAP()
239 .addReg(AddrReg); in expandCMP_SWAP()
280 Register AddrReg = MI.getOperand(3).getReg(); in expandCMP_SWAP_128() local
328 .addReg(AddrReg); in expandCMP_SWAP_128()
357 .addReg(AddrReg); in expandCMP_SWAP_128()
371 .addReg(AddrReg); in expandCMP_SWAP_128()
H A DAArch64FastISel.cpp230 bool emitStoreRelease(MVT VT, unsigned SrcReg, unsigned AddrReg,
2061 unsigned AddrReg, in emitStoreRelease() argument
2074 AddrReg = constrainOperandRegClass(II, AddrReg, 1); in emitStoreRelease()
2077 .addReg(AddrReg) in emitStoreRelease()
2201 Register AddrReg = getRegForValue(PtrV); in selectStore() local
2202 return emitStoreRelease(VT, SrcReg, AddrReg, in selectStore()
2520 Register AddrReg = getRegForValue(BI->getOperand(0)); in selectIndirectBr() local
2521 if (AddrReg == 0) in selectIndirectBr()
2526 AddrReg = constrainOperandRegClass(II, AddrReg, II.getNumDefs()); in selectIndirectBr()
5025 const Register AddrReg = constrainOperandRegClass( in selectAtomicCmpXchg() local
[all …]
/openbsd/gnu/llvm/llvm/lib/Target/PowerPC/GISel/
H A DPPCCallLowering.cpp178 MachineInstrBuilder AddrReg = MIRBuilder.buildFrameIndex(FramePtr, FI); in getStackAddress() local
180 return AddrReg.getReg(0); in getStackAddress()
H A DPPCInstructionSelector.cpp681 Register AddrReg = I.getOperand(1).getReg(); in select() local
685 MachineOperand::CreateReg(AddrReg, /* isDef */ false, in select()
/openbsd/gnu/llvm/llvm/lib/Target/X86/
H A DX86CallLowering.cpp102 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress() local
105 return AddrReg.getReg(0); in getStackAddress()
H A DX86SpeculativeLoadHardening.cpp1161 Register AddrReg = MRI->createVirtualRegister(&X86::GR64RegClass); in tracePredStateThroughIndirectBranches() local
1163 BuildMI(MBB, InsertPt, DebugLoc(), TII->get(X86::LEA64r), AddrReg) in tracePredStateThroughIndirectBranches()
1174 .addReg(AddrReg, RegState::Kill); in tracePredStateThroughIndirectBranches()
H A DX86InstructionSelector.cpp1447 Register AddrReg = MRI.createVirtualRegister(&X86::GR64RegClass); in materializeFP() local
1448 BuildMI(*I.getParent(), I, DbgLoc, TII.get(X86::MOV64ri), AddrReg) in materializeFP()
1457 AddrReg) in materializeFP()
H A DX86MCInstLower.cpp1366 const Register AddrReg = MI.getOperand(0).getReg(); in LowerKCFI_CHECK() local
1370 unsigned TempReg = AddrReg == X86::R10 ? X86::R11D : X86::R10D; in LowerKCFI_CHECK()
1376 .addReg(AddrReg) in LowerKCFI_CHECK()
/openbsd/gnu/llvm/llvm/lib/Target/AArch64/GISel/
H A DAArch64CallLowering.cpp146 auto AddrReg = MIRBuilder.buildFrameIndex(LLT::pointer(0, 64), FI); in getStackAddress() local
147 return AddrReg.getReg(0); in getStackAddress()
267 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress() local
270 return AddrReg.getReg(0); in getStackAddress()
/openbsd/gnu/llvm/llvm/lib/Target/ARM/
H A DARMCallLowering.cpp106 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress() local
109 return AddrReg.getReg(0); in getStackAddress()
H A DARMExpandPseudoInsts.cpp1732 Register AddrReg = MI.getOperand(2).getReg(); in ExpandCMP_SWAP() local
1770 MIB.addReg(AddrReg); in ExpandCMP_SWAP()
1794 .addReg(AddrReg); in ExpandCMP_SWAP()
1862 Register AddrReg = MI.getOperand(2).getReg(); in ExpandCMP_SWAP_64() local
1890 MIB.addReg(AddrReg).add(predOps(ARMCC::AL)); in ExpandCMP_SWAP_64()
1919 MIB.addReg(AddrReg).add(predOps(ARMCC::AL)); in ExpandCMP_SWAP_64()
H A DARMFastISel.cpp1321 Register AddrReg = getRegForValue(I->getOperand(0)); in SelectIndirectBr() local
1322 if (AddrReg == 0) return false; in SelectIndirectBr()
1328 TII.get(Opc)).addReg(AddrReg)); in SelectIndirectBr()
/openbsd/gnu/llvm/llvm/lib/Target/Mips/
H A DMipsCallLowering.cpp239 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress() local
240 return AddrReg.getReg(0); in getStackAddress()
/openbsd/gnu/llvm/llvm/lib/Target/PowerPC/
H A DPPCFastISel.cpp1860 Register AddrReg = getRegForValue(I->getOperand(0)); in SelectIndirectBr() local
1861 if (AddrReg == 0) in SelectIndirectBr()
1865 .addReg(AddrReg); in SelectIndirectBr()

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