/openbsd/gnu/llvm/llvm/lib/Target/LoongArch/ |
H A D | LoongArchISelDAGToDAG.cpp | 155 const APInt &AndMask = N->getConstantOperandAPInt(1); in selectShiftMask() local 160 APInt ShMask(AndMask.getBitWidth(), ShiftWidth - 1); in selectShiftMask() 162 if (ShMask.isSubsetOf(AndMask)) { in selectShiftMask() 170 if (ShMask.isSubsetOf(AndMask | Known.Zero)) { in selectShiftMask()
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/openbsd/gnu/llvm/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
H A D | AMDGPUInstPrinter.cpp | 1396 static void printSwizzleBitmask(const uint16_t AndMask, in printSwizzleBitmask() argument 1402 uint16_t Probe0 = ((0 & AndMask) | OrMask) ^ XorMask; in printSwizzleBitmask() 1403 uint16_t Probe1 = ((BITMASK_MASK & AndMask) | OrMask) ^ XorMask; in printSwizzleBitmask() 1453 uint16_t AndMask = (Imm >> BITMASK_AND_SHIFT) & BITMASK_MASK; in printSwizzle() local 1457 if (AndMask == BITMASK_MAX && OrMask == 0 && llvm::popcount(XorMask) == 1) { in printSwizzle() 1464 } else if (AndMask == BITMASK_MAX && OrMask == 0 && XorMask > 0 && in printSwizzle() 1474 uint16_t GroupSize = BITMASK_MAX - AndMask + 1; in printSwizzle() 1490 printSwizzleBitmask(AndMask, OrMask, XorMask, O); in printSwizzle()
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/openbsd/gnu/llvm/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineSelect.cpp | 133 APInt AndMask; in foldSelectICmpAnd() local 145 AndMask = *AndRHS; in foldSelectICmpAnd() 147 Pred, V, AndMask)) { in foldSelectICmpAnd() 149 if (!AndMask.isPowerOf2()) in foldSelectICmpAnd() 167 if (TC.getBitWidth() != AndMask.getBitWidth() || (TC ^ FC) != AndMask) in foldSelectICmpAnd() 174 V = Builder.CreateAnd(V, ConstantInt::get(SelType, AndMask)); in foldSelectICmpAnd() 202 unsigned AndZeros = AndMask.logBase2(); in foldSelectICmpAnd() 206 V = Builder.CreateAnd(V, ConstantInt::get(V->getType(), AndMask)); in foldSelectICmpAnd()
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/openbsd/gnu/llvm/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelDAGToDAG.cpp | 741 uint64_t AndMask = MaskNode->getZExtValue(); in detectOrAndInsertion() local 742 if (InsertMask & AndMask) in detectOrAndInsertion() 748 if (Used != (AndMask | InsertMask)) { in detectOrAndInsertion() 750 if (Used != (AndMask | InsertMask | Known.Zero.getZExtValue())) in detectOrAndInsertion()
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/openbsd/gnu/llvm/llvm/lib/Transforms/Instrumentation/ |
H A D | DataFlowSanitizer.cpp | 282 uint64_t AndMask; member 1894 uint64_t AndMask = MapParams->AndMask; in getShadowOffset() local 1895 if (AndMask) in getShadowOffset() 1897 IRB.CreateAnd(OffsetLong, ConstantInt::get(IntptrTy, ~AndMask)); in getShadowOffset()
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H A D | MemorySanitizer.cpp | 376 uint64_t AndMask; member 934 CustomMapParams.AndMask = ClAndMask; in initializeModule() 1638 if (uint64_t AndMask = MS.MapParams->AndMask) in getShadowPtrOffset() local 1639 OffsetLong = IRB.CreateAnd(OffsetLong, constToIntPtr(IntptrTy, ~AndMask)); in getShadowPtrOffset()
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/openbsd/gnu/llvm/llvm/lib/Target/RISCV/ |
H A D | RISCVISelDAGToDAG.cpp | 2073 const APInt &AndMask = ShAmt.getConstantOperandAPInt(1); in selectShiftMask() local 2078 APInt ShMask(AndMask.getBitWidth(), ShiftWidth - 1); in selectShiftMask() 2080 if (ShMask.isSubsetOf(AndMask)) { in selectShiftMask() 2086 if (!ShMask.isSubsetOf(AndMask | Known.Zero)) in selectShiftMask()
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/openbsd/gnu/llvm/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 674 APInt AndMask = RHSC->getAPIntValue(); in SelectShiftedRegisterFromAnd() local 676 if (!AndMask.isShiftedMask(LowZBits, MaskLen)) in SelectShiftedRegisterFromAnd() 791 uint64_t AndMask = CSD->getZExtValue(); in getExtendTypeForNode() local 793 switch (AndMask) { in getExtendTypeForNode() 2221 uint64_t AndMask = 0; in isSeveralBitsExtractOpFromShr() local 2222 if (!isOpcWithIntImmediate(N->getOperand(0).getNode(), ISD::AND, AndMask)) in isSeveralBitsExtractOpFromShr() 2232 if (!isMask_64(AndMask >> SrlImm)) in isSeveralBitsExtractOpFromShr() 2237 MSB = findLastSet(AndMask, ZB_Undefined); in isSeveralBitsExtractOpFromShr()
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H A D | AArch64FrameLowering.cpp | 1737 uint64_t AndMask = ~(MFI.getMaxAlign().value() - 1); in emitPrologue() local 1740 .addImm(AArch64_AM::encodeLogicalImmediate(AndMask, 64)); in emitPrologue() 1812 uint64_t AndMask = ~(MFI.getMaxAlign().value() - 1); in emitPrologue() local 1816 .addImm(AArch64_AM::encodeLogicalImmediate(AndMask, 64)); in emitPrologue()
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H A D | AArch64ISelLowering.cpp | 17537 uint64_t AndMask = CSD->getZExtValue(); in isExtendOrShiftOperand() local 17538 return AndMask == 0xff || AndMask == 0xffff || AndMask == 0xffffffff; in isExtendOrShiftOperand()
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/openbsd/gnu/llvm/llvm/lib/Transforms/Utils/ |
H A D | Local.cpp | 3125 const APInt &AndMask = *C; in collectBitParts() local 3129 unsigned NumMaskedBits = AndMask.countPopulation(); in collectBitParts() 3141 if (AndMask[BitIdx] == 0) in collectBitParts()
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/openbsd/gnu/llvm/llvm/lib/Target/AMDGPU/AsmParser/ |
H A D | AMDGPUAsmParser.cpp | 7340 encodeBitmaskPerm(const unsigned AndMask, in encodeBitmaskPerm() argument 7346 (AndMask << BITMASK_AND_SHIFT) | in encodeBitmaskPerm() 7492 unsigned AndMask = 0; in parseSwizzleBitmaskPerm() local 7508 AndMask |= Mask; in parseSwizzleBitmaskPerm() 7511 AndMask |= Mask; in parseSwizzleBitmaskPerm() 7517 Imm = encodeBitmaskPerm(AndMask, OrMask, XorMask); in parseSwizzleBitmaskPerm()
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/openbsd/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 5687 const APInt &AndMask = CAnd->getAPIntValue(); in visitANDLike() local 5694 unsigned MaskBits = AndMask.countTrailingOnes(); in visitANDLike() 5697 if (AndMask.isMask() && in visitANDLike() 5719 SDValue NewMask = DAG.getConstant(AndMask.trunc(Size / 2), SL, HalfVT); in visitANDLike() 24107 SmallVector<SDValue, 16> AndMask(NumElts, DAG.getUNDEF(IntSVT)); in visitVECTOR_SHUFFLE() local 24110 AndMask[I] = Mask[I] == I ? AllOnesElt : ZeroElt; in visitVECTOR_SHUFFLE() 24122 DAG.getBuildVector(IntVT, DL, AndMask))); in visitVECTOR_SHUFFLE() 25594 const APInt &AndMask = ConstAndRHS->getAPIntValue(); in SimplifySelectCC() local 25595 unsigned ShCt = AndMask.getBitWidth() - 1; in SimplifySelectCC() 25598 DAG.getConstant(AndMask.countLeadingZeros(), SDLoc(AndLHS), in SimplifySelectCC()
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/openbsd/gnu/llvm/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64InstructionSelector.cpp | 6666 uint64_t AndMask = *MaybeAndMask; in getExtendTypeForInst() local 6667 switch (AndMask) { in getExtendTypeForInst()
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/openbsd/gnu/llvm/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 17509 uint32_t AndMask = static_cast<uint32_t>(AndMaskNode->getZExtValue()); in PerformShiftCombine() local 17511 if (AndMask == 255 || AndMask == 65535) in PerformShiftCombine() 17513 if (isMask_32(AndMask)) { in PerformShiftCombine() 17514 uint32_t MaskedBits = countLeadingZeros(AndMask); in PerformShiftCombine()
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/openbsd/gnu/llvm/clang/lib/CodeGen/ |
H A D | CGBuiltin.cpp | 3050 APInt AndMask = APInt::getSignedMaxValue(bitsize); in EmitBuiltinExpr() local 3052 Builder.CreateAnd(IntV, llvm::ConstantInt::get(IntTy, AndMask)); in EmitBuiltinExpr()
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